ADA4941-1

Rev. C | Page 6 of 24

ABSOLUTE MAXIMUM RATINGS

Table 4.

Parameter

Rating

Supply Voltage

12 V

Power Dissipation

See Figure 3

Storage Temperature Range

−65°C to +125°C

Operating Temperature Range

−40°C to +85°C

Lead Temperature (Soldering 10 sec)

300°C

Junction Temperature

150°C

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

THERMAL RESISTANCE

specified for a device soldered in the circuit board with its

exposed paddle soldered to a pad (if applicable) on the PCB

surface that is thermally connected to a copper plane, with zero

airflow.

Table 5. Thermal Resistance

Package Type

Unit

8-Lead SOIC on 4-Layer Board

126

28

°C/W

8-Lead LFCSP with EP on 4-Layer Board

83

19

°C/W

Maximum Power Dissipation

The maximum safe power dissipation in the ADA4941-1

package is limited by the associated rise in junction temperature

transition temperature, the plastic changes its properties. Even

temporarily exceeding this temperature limit can change the

stresses that the package exerts on the die, permanently shifting

the parametric performance of the ADA4941-1. Exceeding a

junction temperature of 150°C for an extended period can

result in changes in the silicon devices potentially causing

failure.

quiescent power dissipation and the power dissipated in the

package due to the load drive for all outputs. The quiescent

drive depends upon the particular application. For each output,

the power due to load drive is calculated by multiplying the load

current by the associated voltage drop across the device. The

power dissipated due to all of the loads is equal to the sum of

the power dissipation due to each individual load. RMS voltages

and currents must be used in these calculations.

addition, more metal directly in contact with the package leads

from metal traces, through holes, ground, and power planes

package must be soldered to a pad on the PCB surface that is

Figure 3 shows the maximum safe power dissipation in the

packages vs. the ambient temperature for the 8-lead SOIC

(126°C/W) and for the 8-lead LFCSP (83°C/W) on a JEDEC

standard 4-layer board. The LFCSP must have its underside

paddle soldered to a pad that is thermally connected to a PCB

2.5

0

–40

120

AMBIENT TEMPERATURE (°C)

2.0

1.5

1.0

0.5

–20

0

20

40

60

80

100

LFCSP

SOIC

Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on

the human body and test equipment and can discharge without detection. Although this product features

proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy

electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance

degradation or loss of functionality.