MT46V32M16 datasheet(71/93 Pages) MICRON

Part #	MT46V32M16

Description	512Mb: x4, x8, x16 Double Data Rate SDRAM Features

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Manufacturer	MICRON [Micron Technology]

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Micron Technology, Inc., reserves the right to change products or specifications without notice.

DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. Q; Core DDR Rev. E 7/11 EN

71

512Mb: x4, x8, x16 DDR SDRAM

Operations

Figure 35:

Bank READ – Without Auto Precharge

Notes:

1. NOP commands are shown for ease of illustration; other commands may be valid at these

times.

2. BL = 4.

3. The PRECHARGE command can only be applied at T5 if tRAS (MIN) is met.

4. Disable auto precharge.

5. “Don’t Care” if A10 is HIGH at T5.

6. DO n (or b) = data-out from column n (or column b); subsequent elements are provided in

the programmed order.

7. Refer to Figure 36 on page 72, Figure 37 on page 73, and Figure 38 on page 74 for detailed

DQS and DQ timing.

CK

CK#

CKE

A10

BA0, BA1

tCK

tCH

tCL

tIS

tIH

tIS

tIH

tIS

tIH

tRCD

tRC

tRP

CL = 2

DM

T0

T1

T2

T3

T4

T5

T5n

T6n

T6

T7

T8

DQS

Case 1: tAC (MIN) and tDQSCK (MIN)

Case 2: tAC (MAX) and tDQSCK (MAX)

DQS

tRPRE

tRPST

tDQSCK (MIN)

tLZ (MIN)

tAC (MIN)

tLZ (MIN)

DO

n

tHZ (MAX)

tAC (MAX)

DO

n

ACT

Col n

Bank x

ACT

Bank x

tDQSCK (MAX)

NOP

1

NOP

1

NOP

1

NOP

1

NOP

1

READ

2

PRE

3

4

Bank x

5

tRAS3

Row

DQ

Command

Address

Transitioning Data

Don’t Care

All banks

One bank

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