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A1425A-PL84C Datasheet(PDF) 41 Page - Microsemi Corporation |
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A1425A-PL84C Datasheet(HTML) 41 Page - Microsemi Corporation |
41 / 90 page Accelerator Series FPGAs – ACT 3 Family R e visio n 3 2 - 33 A1440A, A14V40A Timing Characteristics (continued) Table 2-29 • A1440A, A14V40A Worst-Case Commercial Conditions, VCC = 4.75 V, TJ = 70°C Dedicated (hardwired) I/O Clock Network –3 Speed1 –2 Speed1 –1 Speed Std. Speed 3.3 V Speed1 Units Parameter/Description Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. tIOCKH Input Low to High (pad to I/O module input) 2.0 2.3 2.6 3.0 3.5 ns tIOPWH Minimum Pulse Width High 1.9 2.4 3.3 3.8 4.8 ns tIPOWL Minimum Pulse Width Low 1.9 2.4 3.3 3.8 4.8 ns tIOSAPW Minimum Asynchronous Pulse Width 1.9 2.4 3.3 3.8 4.8 ns tIOCKSW Maximum Skew 0.4 0.4 0.4 0.4 0.4 ns tIOP Minimum Period 4.0 5.0 6.8 8.0 10.0 ns fIOMAX Maximum Frequency 250 200 150 125 100 MHz Dedicated (hardwired) Array Clock tHCKH Input Low to High (pad to S-module input) 3.0 3.4 3.9 4.5 5.5 ns tHCKL Input High to Low (pad to S-module input) 3.0 3.4 3.9 4.5 5.5 ns tHPWH Minimum Pulse Width High 1.9 2.4 3.3 3.8 4.8 ns tHPWL Minimum Pulse Width Low 1.9 2.4 3.3 3.8 4.8 ns tHCKSW Delta High to Low, Low Slew 0.3 0.3 0.3 0.3 0.3 ns tHP Minimum Period 4.0 5.0 6.8 8.0 10.0 ns fHMAX Maximum Frequency 250 200 150 125 100 MHz Routed Array Clock Networks tRCKH Input Low to High (FO = 64) 3.7 4.1 4.7 5.5 9.0 ns tRCKL Input High to Low (FO = 64) 4.0 4.5 5.1 6.0 9.0 ns tRPWH Min. Pulse Width High (FO = 64) 3.3 3.8 4.2 4.9 6.5 ns tRPWL Min. Pulse Width Low (FO = 64) 3.3 3.8 4.2 4.9 6.5 ns tRCKSW Maximum Skew (FO = 128) 0.7 0.8 0.9 1.0 1.0 ns tRP Minimum Period (FO = 64) 6.8 8.0 8.7 10.0 13.4 ns fRMAX Maximum Frequency (FO = 64) 150 125 115 100 75 MHz Clock-to-Clock Skews tIOHCKSW I/O Clock to H-Clock Skew 0.0 1.7 0.0 1.8 0.0 2.0 0.0 2.2 0.0 3.0 ns tIORCKSW I/O Clock to R-Clock Skew (FO = 64) (FO = 144) 0.0 0.0 1.0 3.0 0.0 0.0 1.0 3.0 0.0 0.0 1.0 3.0 0.0 0.0 1.0 3.0 0.0 0.0 3.0 3.0 ns tHRCKSW H-Clock to R-Clock Skew (FO = 64) (FO = 144) 0.0 0.0 1.0 3.0 0.0 0.0 1.0 3.0 0.0 0.0 1.0 3.0 0.0 0.0 1.0 3.0 0.0 0.0 1.0 3.0 ns Notes: 1. The –2 and –3 speed grades have been discontinued. Refer to PDN 0104, PDN 0203, PDN 0604, and PDN 1004 at http://www.microsemi.com/soc/support/notifications/default.aspx#pdn. 2. Delays based on 35 pF loading. |
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