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C8051F332-GM Datasheet(PDF) 3 Page - Silicon Laboratories |
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C8051F332-GM Datasheet(HTML) 3 Page - Silicon Laboratories |
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3 / 210 page  Rev. 1.7 3 C8051F330/1/2/3/4/5 Table of Contents 1. System Overview.................................................................................................... 17 1.1. CIP-51™ Microcontroller Core.......................................................................... 22 1.1.1. Fully 8051 Compatible.............................................................................. 22 1.1.2. Improved Throughput ............................................................................... 22 1.1.3. Additional Features .................................................................................. 23 1.2. On-Chip Memory............................................................................................... 24 1.3. On-Chip Debug Circuitry................................................................................... 25 1.4. Programmable Digital I/O and Crossbar ........................................................... 26 1.5. Serial Ports ....................................................................................................... 26 1.6. Programmable Counter Array ........................................................................... 27 1.7. 10-Bit Analog to Digital Converter..................................................................... 28 1.8. Comparators ..................................................................................................... 29 1.9. 10-bit Current Output DAC................................................................................ 30 2. Absolute Maximum Ratings .................................................................................. 31 3. Global Electrical Characteristics .......................................................................... 32 4. Pinout and Package Definitions............................................................................ 35 5. 10-Bit ADC (ADC0, C8051F330/2/4 only) .............................................................. 41 5.1. Analog Multiplexer ............................................................................................ 41 5.2. Temperature Sensor ......................................................................................... 42 5.3. Modes of Operation .......................................................................................... 43 5.3.1. Starting a Conversion............................................................................... 44 5.3.2. Tracking Modes........................................................................................ 45 5.3.3. Settling Time Requirements ..................................................................... 46 5.4. Programmable Window Detector ...................................................................... 51 5.4.1. Window Detector In Single-Ended Mode ................................................. 53 5.4.2. Window Detector In Differential Mode...................................................... 54 6. 10-Bit Current Mode DAC (IDA0, C8051F330 only).............................................. 57 6.1. IDA0 Output Scheduling ................................................................................... 57 6.1.1. Update Output On-Demand ..................................................................... 57 6.1.2. Update Output Based on Timer Overflow ................................................ 58 6.1.3. Update Output Based on CNVSTR Edge................................................. 58 6.2. IDAC Output Mapping....................................................................................... 58 7. Voltage Reference (C8051F330/2/4 only).............................................................. 61 8. Comparator0 ........................................................................................................... 65 9. CIP-51 Microcontroller ........................................................................................... 71 9.1. Instruction Set ................................................................................................... 72 9.1.1. Instruction and CPU Timing ..................................................................... 72 9.1.2. MOVX Instruction and Program Memory ................................................. 72 9.2. Memory Organization........................................................................................ 76 9.2.1. Program Memory...................................................................................... 77 9.2.2. Data Memory............................................................................................ 78 9.2.3. General Purpose Registers ...................................................................... 78 9.2.4. Bit Addressable Locations........................................................................ 78 |
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