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PIC16F57 Datasheet(PDF) 10 Page - Microchip Technology |
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PIC16F57 Datasheet(HTML) 10 Page - Microchip Technology |
10 / 88 page PIC16F5X DS41213D-page 8 © 2007 Microchip Technology Inc. FIGURE 2-1: PIC16F5X SERIES BLOCK DIAGRAM WDT Time-out 8 Stack 1 Stack 2 Flash 512 X 12 (F54) 2048 X 12(F57) 2048 x 12(F59) Instruction Register Instruction Decoder Watchdog Timer Configuration Word Oscillator/ Timing & Control General Purpose Register File (SRAM) 25, 72 or 134 Bytes WDT/TMR0 Prescaler Option Reg. “Option” “Sleep” “Code- Protect” “Osc Select” Direct Address TMR0 From W From W “TRIS 5” “TRIS 6” “TRIS 7” SFR TRISA PORTA TRISB PORTC TRISC PORTB From W T0CKI Pin 9-11 9-11 12 12 8 W 4 4 4 Data Bus 8 8 8 8 8 8 8 ALU STATUS From W CLKOUT 8 9 6 5 5-7 OSC1 OSC2 MCLR PC “Disable” 2 RA<3:0> RB<7:0> RC<7:0> PIC16F57/59 only Direct RAM Address “TRIS 8” PORTD TRISD From W 8 8 8 RD<7:0> PIC16F59 only “TRIS 9” PORTE TRISE From W 4 4 RE<7:4> PIC16F59 only 8 |
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Similar Description - PIC16F57 |
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