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SCES643E Datasheet(PDF) 2 Page - Texas Instruments |
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SCES643E Datasheet(HTML) 2 Page - Texas Instruments |
2 / 27 page TXB0108 SCES643E – NOVEMBER 2006 – REVISED MAY 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. DESCRIPTION/ORDERING INFORMATION This 8-bit noninverting translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes. VCCA should not exceed VCCB. When the output-enable (OE) input is low, all outputs are placed in the high-impedance state. The TXB0101 is designed so that the OE input circuit is supplied by VCCA. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. Table 1. ORDERING INFORMATION(1) TA PACKAGE(2) ORDERABLE PART NUMBER TOP-SIDE MARKING QFN – RGY Reel of 1000 TXB0108RGYR YE08 SON – DQS Reel of 2000 TXB0108DQSR 5MR TSSOP – PW Reel of 2000 TXB0108PWR YE08 –40°C to 85°C VFBGA – GXY Reel of 2500 TXB0108GXYR YE08 VFBGA – ZXY (Pb-free) Reel of 2500 TXB0108ZXYR YE08 DSBGA - YZP Reel of 2500 TXB0108YZPR 5M (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. (2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. PIN DESCRIPTION PIN NUMBER NAME FUNCTION PW, RGY DQS YZP 1 1 A3 A1 Input/output 1. Referenced to VCCA. 2 5 C4 VCCA A-port supply voltage. 1.1 V ≤ VCCA ≤ 3.6 V, VCCA ≤ VCCB. 3 2 A4 A2 Input/output 2. Referenced to VCCA. 4 3 B3 A3 Input/output 3. Referenced to VCCA. 5 4 B4 A4 Input/output 4. Referenced to VCCA. 6 7 C3 A5 Input/output 5. Referenced to VCCA. 7 8 E4 A6 Input/output 6. Referenced to VCCA. 8 9 D3 A7 Input/output 7. Referenced to VCCA. 9 10 E3 A8 Input/output 8. Referenced to VCCA. 10 6 D4 OE Output enable. Pull OE low to place all outputs in 3-state mode. Referenced to VCCA. 11 15 D1 GND Ground 12 11 E2 B8 Input/output 8. Referenced to VCCB. 13 12 D2 B7 Input/output 7. Referenced to VCCB. 14 13 E1 B6 Input/output 6. Referenced to VCCB. 15 14 C2 B5 Input/output 5. Referenced to VCCB. 16 17 B1 B4 Input/output 4. Referenced to VCCB. 17 18 B2 B3 Input/output 3. Referenced to VCCB. 18 19 A1 B2 Input/output 2. Referenced to VCCB. 19 16 C1 VCCB B-port supply voltage. 1.65 V ≤ VCCB ≤ 5.5 V. 20 20 A2 B1 Input/output 1. Referenced to VCCB. — Thermal Pad For the RGY package, the exposed center thermal pad must be connected to ground. 2 Submit Documentation Feedback Copyright © 2006–2012, Texas Instruments Incorporated Product Folder Link(s): TXB0108 |
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