LVCMOS/LVTTL FANOUT BUFFER/DIVIDER

ICS87004I-03

1

ICS87004BGI-03 REV. B JUNE 10, 2008

PRELIMINARY

The ICS87004I-03 is a low skew, ÷1, ÷2 ÷3, ÷4 ÷5,

÷6 ÷8, ÷16 LVCMOS/LVTTL Fanout Buffer/Divider

and a member of theHiPerClockS™ family of High

Perfo r mance Clock Solutions from IDT. The

ICS87004I-03 has selectable clock inputs that

accept single ended input levels. Output enable pin controls

whether the output is in the active or high impedance state.

The ICS87004I-03 is characterized at 3.3V, 2.5V and mixed

3.3V/2.5V, 3.3V/1.8V, 2.5V/1.8V input/output supply operating

modes.Guaranteed bank, output, and par t-to-par t skew

character istics make the ICS87004I-03 ideal for those

applications demanding well defined perfo r mance and

repeatability.

• Two banks of two LVCMOS/LVTTL outputs,

15

Ω typical output impedance

• Selectable LVCMOS/LVTTL clock inputs

• LVCMOS_CLK supports the following input types: LVCMOS,

LVTTL

•

Maximum output frequency: 250MHz

•

Output skew: 40ps (typical)

•

Bank skew: 20ps (typical)

•

Part-to-part skew: TBD

• Power supply modes:

Core/Output

3.3V/3.3V

3.3V/2.5V

3.3V/1.8V

2.5V/2.5V

2.5V/1.8V

• -40°C to 85°C ambient operating temperature

• Available in both standard (RoHS 5) and lead-free (RoHS 6)

packages

HiPerClockS™

ICS

The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization

and/or qualification. Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.

CLK0

CLK1

QA0

QA1

CLK_SEL

NB2:NB0

OEB

N Output Divider

NA2:NA0

0 0 0 ÷1 (default)

0 0 1 ÷2

0 1 0 ÷3

0 1 1 ÷4

1 0 0 ÷5

1 0 1 ÷6

1 1 0 ÷8

1 1 1 ÷16

N Output Divider

NB2:NB0

0 0 0 ÷1 (default)

0 0 1 ÷2

0 1 0 ÷3

0 1 1 ÷4

1 0 0 ÷5

1 0 1 ÷6

1 1 0 ÷8

1 1 1 ÷16

0

1

3

3

Pulldown

Pulldown

Pullup

Pulldown

Pulldown

V

DD0A

V

DD0B

QB0

QB1

OEA

NA2:NA0

ICS87004I-03

20-Lead TSSOP

6.50mm x 4.40mm x 0.925mm package body

G Package

Top View

Pulldown

Pullup

NA2

NA1

NA0

CLK0

CLK_SEL

CLK1

NB2

NB1

NB0

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

OEA

QA0

QA1

GND

QB1

QB0

GND

OEB