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R5F51113ADFM Datasheet(PDF) 4 Page - Renesas Technology Corp |
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R5F51113ADFM Datasheet(HTML) 4 Page - Renesas Technology Corp |
4 / 110 page R01DS0190EJ0100 Rev.1.00 Page 4 of 107 Jun 19, 2013 RX111 Group 1. Overview Communication function USB 2.0 host/function module (USBc) USB Device Controller (UDC) and transceiver for USB 2.0 are incorporated. Host (32-Kbyte or more ROM)/function module: 1 port Compliant with USB version 2.0 Transfer speed: Full-speed (12 Mbps), low-speed (1.5 Mbps) OTG (ON-The-Go) is supported. Isochronous transfer is supported. BC (Battery Charger) is supported. 12-bit A/D converter (S12ADb) 1 unit (1 unit × 14 channels) 12-bit resolution Minimum conversion time: 1.0 µs per channel when the ADCLK is operating at 32 MHz Operating modes Scan mode (single scan mode, continuous scan mode, and group scan mode) Double trigger mode (duplication of A/D conversion data) A/D conversion start conditions A software trigger, a trigger from a timer (MTU), an external trigger signal, or ELC Temperature sensor (TEMPSa) 1 channel The voltage of the temperature is converted into a digital value by the 12-bit A/D converter. D/A converter (DA) 2 channels 8-bit resolution Output voltage: 0 V to VCC CRC calculator (CRC) CRC code generation for arbitrary amounts of data in 8-bit units Select any of three generating polynomials: X8 + X2 + X + 1, X16 + X15 + X2 + 1, or X16 + X12 + X5 + 1 Generation of CRC codes for use with LSB-first or MSB-first communications is selectable. Data operation circuit (DOC) Comparison, addition, and subtraction of 16-bit data Power supply voltages/Operating frequencies VCC = 1.8 to 2.4 V: 8 MHz, VCC = 2.4 to 2.7 V: 16 MHz, VCC = 2.7 to 3.6 V: 32 MHz Supply current 3.2 mA at 32 MHz (typ.) Operating temperature range D version: 40 to +85°C, G version: 40 to +105°C Packages 64-pin LFQFP (PLQP0064KB-A) 10 × 10 mm, 0.5 mm pitch 64-pin LQFP (PLQP0064GA-A) 14 × 14 mm, 0.8 mm pitch 64-pin WFLGA (PWLG0064KA-A) 5 × 5 mm, 0.5 mm pitch 48-pin LFQFP (PLQP0048KB-A) 7 × 7 mm, 0.5 mm pitch 48-pin HWQFN (PWQN0048KB-A) 7 × 7 mm, 0.5 mm pitch 40-pin HWQFN (PWQN0040KC-A) 6 × 6mm, 0.50mm pitch 36-pin WFLGA (PWLG0036KA-A) 4 × 4 mm, 0.5 mm pitch On-chip debugging system E1 emulator (FINE interface) Table 1.1 Outline of Specifications (3/3) Classification Module/Function Description |
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