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CY8C3865AXI-019 Datasheet(PDF) 3 Page - Cypress Semiconductor |
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CY8C3865AXI-019 Datasheet(HTML) 3 Page - Cypress Semiconductor |
3 / 129 page PSoC® 3: CY8C38 Family Data Sheet Document Number: 001-11729 Rev. *R Page 3 of 129 1. Architectural Overview Introducing the CY8C38 family of ultra low-power, flash Programmable System-on-Chip (PSoC®) devices, part of a scalable 8-bit PSoC 3 and 32-bit PSoC 5 platform. The CY8C38 family provides configurable blocks of analog, digital, and interconnect circuitry around a CPU subsystem. The combination of a CPU with a flexible analog subsystem, digital subsystem, routing, and I/O enables a high level of integration in a wide variety of consumer, industrial, and medical applications. Figure 1-1. Simplified Block Diagram Figure 1-1 illustrates the major components of the CY8C38 family. They are: 8051 CPU subsystem Nonvolatile subsystem Programming, debug, and test subsystem Inputs and outputs Clocking Power Digital subsystem Analog subsystem PSoC’s digital subsystem provides half of its unique configurability. It connects a digital signal from any peripheral to any pin through the digital system interconnect (DSI). It also provides functional flexibility through an array of small, fast, low-power UDBs. PSoC Creator provides a library of prebuilt and tested standard digital peripherals (UART, SPI, LIN, PRS, CRC, timer, counter, PWM, AND, OR, and so on) that are mapped to the UDB array. You can also easily create a digital circuit using boolean primitives by means of graphical design entry. Each UDB contains programmable array logic (PAL)/programmable logic device (PLD) functionality, together with a small state machine engine to support a wide variety of peripherals. In addition to the flexibility of the UDB array, PSoC also provides configurable digital blocks targeted at specific functions. For the CY8C38 family these blocks can include four 16-bit timers, counters, and PWM blocks; I2C slave, master, and multimaster; FS USB; and Full CAN 2.0b. Digital Filter Block Analog System LCD Direct Drive CapSense Temperature Sensor 4 x Opamp + - ADC 4 x DAC 1 x Del Sig ADC 4 x SC/CT Blocks (TIA, PGA, Mixer etc) 4 x CMP + - CAN 2.0 I 2C Master/ Slave Universal Digital Block Array (24x UDB) 4 x Timer Counter PWM FS USB 2.0 System Wide Resources Digital System Program Debug & Trace Boundary Scan Program & Debug 8051or Cortex M3CPU Interrupt Controller PHUB DMA SRAM FLASH EEPROM EMIF CPU System Memory System System Bus Digital Interconnect Analog Interconnect 0.5 to 5.5 V ( Optional) 425 MHz (Optional) Xtal Osc 32.768 KHz ( Optional) RTC Timer IMO WDT and Wake ILO Clocking System 1.8V LDO SMP POR and LVD Sleep Power Power Management System USB PHY 3 per Opamp UDB UDB UDB UDB UDB UDB UDB UDB UDB UDB UDB UDB UDB UDB UDB UART Logic 12- bit PWM I 2C Slave 8-bit SPI 12-bit SPI Logic 8-bit Timer 16-bit PRS UDB 8-bit Timer Quadrature Decoder 16-bit PWM UDB UDB UDB UDB UDB UDB UDB UDB 22 Ω V to [+] Feedback |
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