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AD7304BRU-REEL7 Datasheet(PDF) 4 Page - Analog Devices

Part No. AD7304BRU-REEL7
Description  3 V/5 V, Rail-to-Rail Quad, 8-Bit DAC
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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AD7304BRU-REEL7 Datasheet(HTML) 4 Page - Analog Devices

 
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AD7304/AD7305
Rev. C | Page 4 of 20
VOUT = 10V p-p
+5V
0V
–5V
+5V
0V
–5V
(IN)
VREF = 10V p-p
f = 20kHz
(OUT)
Figure 3. Rail-to-Rail Reference Input to Output at 20 kHz
TIMING SPECIFICATIONS
@ VDD = 3 V or 5 V, VSS = 0 V; or VDD = +5 V and VSS = –5 V, VSS ≤ VREF ≤ VDD, –40°C < TA < +85°C/+125°C, unless otherwise noted.
Table 2.
Parameter
Symbol
3 V ± 10%
5 V ± 10%
±5 V ± 10%
Unit
INTERFACE TIMING SPECIFICATIONS1, 2
AD7304 Only
Clock Width High
tCH
70
55
55
ns min
Clock Width Low
tCL
70
55
55
ns min
Data Setup
tDS
50
40
40
ns min
Data Hold
tDH
30
20
20
ns min
Load Pulse Width
tLDW
70
60
60
ns min
Load Setup
tLD1
40
30
30
ns min
Load Hold
tLD2
40
30
30
ns min
Clear Pulse Width
tCLWR
60
60
60
ns min
Select
tCSS
30
20
20
ns min
Deselect
tCSH
60
40
40
ns min
AD7305 Only
Data Setup
tDS
60
40
40
ns min
Data Hold
tDH
30
20
20
ns min
Address Setup
tAS
60
40
40
ns min
Address Hold
tAH
30
20
20
ns min
Write Width
tWR
60
50
50
ns min
Load Pulse Width
tLDW
60
50
50
ns min
Load Setup
tLS
60
40
40
ns min
Load Hold
tLH
30
20
20
ns min
1 These parameters are guaranteed by design and not subject to production testing.
2 All input control signals are specified with tR = tF = 2 ns (10% to 90% of VDD) and timed from a voltage level of 1.6 V.


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