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AD7304BRZ-REEL1 Datasheet(PDF) 14 Page - Analog Devices

Part No. AD7304BRZ-REEL1
Description  3 V/5 V, Rail-to-Rail Quad, 8-Bit DAC
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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AD7304BRZ-REEL1 Datasheet(HTML) 14 Page - Analog Devices

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AD7304/AD7305
Rev. C | Page 14 of 20
CIRCUIT OPERATION
The AD7304/AD7305 are 4-channel, 8-bit, voltage output
DACs, differing primarily in digital logic interface and number
of reference inputs. Both parts share the same internal DAC
design and true rail-to-rail output buffers. The AD7304 contains
four independent multiplying reference inputs, while the
AD7305 has one common reference input. The AD7304 uses a
3-wire SPI-compatible serial data interface, while the AD7305
offers an 8-bit parallel data interface.
DAC SECTION
Each part contains four voltage-switched R-2R ladder DACs.
Figure 33 shows a typical equivalent DAC. These DACs are
designed to operate both single-supply or dual-supply,
depending on whether the user supplies a negative voltage on
the VSS pin. In a single-supply application, the VSS is tied to
ground. In either mode, the DAC output voltage is determined
by the VREF input voltage and the digital data (D) loaded into
the corresponding DAC register according to Equation 1.
VOUT = VREF D/256
(1)
Note that the output full-scale polarity is the same as the VREF
polarity for dc reference voltages.
VREF
DB7
2R
VDD
VSS
VOUT
R
2R
DB6
2R
DB0
2R
Figure 33. Typical Equivalent DAC Channel
These DACs are also designed to accommodate ac reference
input signals. As long as the ac signals are maintained between
VSS < VREF < VDD, the user can expect 50 kHz of full power,
multiplying bandwidth performance. In order to use negative
input reference voltages, the VSS pin must be biased with a
negative voltage of equal or greater magnitude than the
reference voltage.
The reference inputs are code dependent, exhibiting worst-case
minimum resistance values specified in the parametric specifi-
cation table. The DAC outputs VOUTA, VOUTB, VOUTC, and VOUTD
are each capable of driving 2 kΩ loads in parallel with up to 500 pF
loads. Output sink current and source current are shown in
Figure 10 and Figure 11, respectively. The output slew rate is
nominally 3.6 V/µs while operating from ±5 V supplies. The
low output impedance of the buffers minimizes crosstalk
between analog input channels. At 100 kHz, 65 dB of channel-
to-channel isolation exists (Figure 26). Output voltage noise is
plotted in Figure 23. In order to maintain good analog perform-
ance, power supply bypassing of 0.01 µF in parallel with 1 µF is
recommended. The true rail-to-rail capability of the AD7304/AD7305
allows the user to connect the reference inputs directly to the
same supply as the VDD or VSS pin (Figure 34). Under these
conditions, clean power supply voltages (low ripple, avoid
switching supplies) appropriate for the application should be
used.
VDD
VSS
VOUTX
120k
Q1
Q2
Figure 34. Equivalent DAC Amplifier Output Circuit


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