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AD5426 Datasheet(PDF) 22 Page - Analog Devices

Part No. AD5426
Description  8-/10-/12-Bit High Bandwidth Multiplying DACs with Serial Interface
Download  24 Pages
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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AD5426 Datasheet(HTML) 22 Page - Analog Devices

 
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AD5426/AD5432/AD5443
Data Sheet
Rev. G | Page 22 of 24
PCB LAYOUT AND POWER SUPPLY DECOUPLING
In any circuit where accuracy is important, careful consideration of
the power supply and ground return layout helps to ensure the
rated performance. The printed circuit board on which the
AD5426/AD5432/AD5443 is mounted should be designed so
that the analog and digital sections are separated and confined
to certain areas of the board. If the DAC is in a system where
multiple devices require an AGND-to-DGND connection, the
connection should be made at one point only. The star ground
point should be established as close to the device as possible.
The DAC should have ample supply bypassing of 10 µF in parallel
with 0.1 µF on the supply located as close to the package as
possible, ideally right up against the device. The 0.1 µF capacitor
should have low effective series resistance (ESR) and effective
series inductance (ESI), like the common ceramic types that
provide a low impedance path to ground at high frequencies to
handle transient currents due to internal logic switching. Low
ESR, 1 µF to 10 µF tantalum or electrolytic capacitors should
also be applied at the supplies to minimize transient disturbance
and filter out low frequency ripple.
Fast switching signals such as clocks should be shielded with
digital ground to avoid radiating noise to other parts of the
board and should never be run near the reference inputs.
Avoid crossover of digital and analog signals. Traces on opposite
sides of the board should run at right angles to each other. This
reduces the effects of feedthrough through the board. A micro-
strip technique is by far the best, but not always possible with a
double-sided board. In this technique, the component side of the
board is dedicated to ground plane while signal traces are placed
on the solder side.
It is good practice to employ compact, minimum lead length
PCB layout design. Leads to the input should be as short as
possible to minimize IR drops and stray inductance.
The PCB metal traces between VREF and RFB should also be
matched to minimize gain error. To maximize on high frequency
performance, the I-to-V amplifier should be located as close to
the device as possible.


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