Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

AD5426 Datasheet(PDF) 21 Page - Analog Devices

Part No. AD5426
Description  8-/10-/12-Bit High Bandwidth Multiplying DACs with Serial Interface
Download  24 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  AD [Analog Devices]
Homepage  http://www.analog.com
Logo 

AD5426 Datasheet(HTML) 21 Page - Analog Devices

 
Zoom Inzoom in Zoom Outzoom out
 21 / 24 page
background image
Data Sheet
AD5426/AD5432/AD5443
Rev. G | Page 21 of 24
Standalone Mode
After power-on, write 1001 to the control word to disable daisy-
chain mode. The first falling edge of SYNC resets a counter that
counts the number of serial clocks, ensuring the correct number
of bits are shifted in and out of the serial shift registers. A rising
edge on SYNC during a write causes the write cycle to be aborted.
After the falling edge of the 16th SCLK pulse, data is auto-
matically transferred from the input shift register to the DAC.
For another serial transfer to take place, the counter must be
reset by the falling edge of SYNC.


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn