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AD5426 Datasheet(PDF) 18 Page  Analog Devices 

AD5426 Datasheet(HTML) 18 Page  Analog Devices 
18 / 24 page AD5426/AD5432/AD5443 Data Sheet Rev. G  Page 18 of 24 ADDING GAIN In applications where the output voltage is required to be greater than VIN, gain can be added with an additional external amplifier or it can be achieved in a single stage. It is important to consider the effect of temperature coefficients of the thin film resistors of the DAC. Simply placing a resistor in series with the RFB resistor causes mismatches in the temperature coefficients, resulting in larger gain temperature coefficient errors. Instead, the circuit shown in Figure 46 is a recommended method of increasing the gain of the circuit. R1, R2, and R3 should all have similar temperature coefficients, but they need not match the temperature coefficients of the DAC. This approach is recommended in circuits where gains of greater than 1 are required. R1 R3 R2 VIN R1 = R2R3 R2 + R3 GAIN = R2 + R3 R2 NOTES 1. ADDITIONAL PINS OMITTED FOR CLARITY. 2. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED IF A1 IS A HIGH SPEED AMPLIFIER. VOUT GND IOUT2 IOUT1 RFB A1 VREF VDD VDD C1 Figure 46. Increasing Gain of Current Output DAC DACS USED AS A DIVIDER OR PROGRAMMABLE GAIN ELEMENT Currentsteering DACs are very flexible and lend themselves to many different applications. If this type of DAC is connected as the feedback element of an op amp and RFB is used as the input resistor as shown in Figure 47, then the output voltage is inversely proportional to the digital input fraction, D. For D = 1 − 2−n the output voltage is VOUT = −VIN/D = −VIN/(1 − 2−N) As D is reduced, the output voltage increases. For small values of D, it is important to ensure that the amplifier does not saturate and also that the required accuracy is met. For example, an 8bit DAC driven with the binary code 0x10 (00010000), that is, 16 decimal, in the circuit of Figure 47 should cause the output voltage to be 16 × VIN. However, if the DAC has a linearity specification of ±0.5 LSB, then D can in fact have the weight anywhere in the range 15.5/256 to 16.5/256 so that the possible output voltage will be in the range 15.5 VIN to 16.5 VIN—an error of +3% even though the DAC itself has a maximum error of 0.2%. DAC leakage current is also a potential error source in divider circuits. The leakage current must be counterbalanced by an opposite current supplied from the op amp through the DAC. Since only a fraction D of the current into the VREF terminal is routed to the IOUT1 terminal, the output voltage has to change as follows: Output Error Voltage due to DAC Leakage = (Leakage × R)/D where R is the DAC resistance at the VREF terminal. For a DAC leakage current of 10 nA, R = 10 kΩ, and a gain (that is, 1/D) of 16, the error voltage is 1.6 mV. GND IOUT1 IOUT2 RFB VREF VDD VDD ADDITIONAL PINS OMITTED FOR CLARITY. VOUT VIN Figure 47. Current Steering DAC as a Divider or Programmable Gain Element REFERENCE SELECTION When selecting a reference for use with the AD5426 series of current output DACs, pay attention to the references output voltage temperature coefficient specification. This parameter not only affects the fullscale error, but can also affect the linearity (INL and DNL) performance. The reference temperature coefficient should be consistent with the system accuracy specifications. For example, an 8bit system required to hold its overall specification to within 1 LSB over the temperature range 0°C to 50°C dictates that the maximum system drift with temperature should be less than 78 ppm/°C. A 12bit system with the same temperature range to overall specification within 2 LSBs requires a maximum drift of 10 ppm/°C. By choosing a precision reference with low output temperature coefficient this error source can be minimized. Table 7 suggests some references available from Analog Devices that are suitable for use with this range of current output DACs. AMPLIFIER SELECTION The primary requirement for the currentsteering mode is an amplifier with low input bias currents and low input offset voltage. The input offset voltage of an op amp is multiplied by the variable gain (due to the codedependent output resistance of the DAC) of the circuit. A change in this noise gain between two adjacent digital fractions produces a step change in the output voltage due to the amplifier’s input offset voltage. This output voltage change is superimposed on the desired change in output between the two codes and gives rise to a differential linearity error, which, if large enough, could cause the DAC to be nonmonotonic. In general, the input offset voltage should be 
