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AD5426 Datasheet(PDF) 16 Page  Analog Devices 

AD5426 Datasheet(HTML) 16 Page  Analog Devices 
16 / 24 page AD5426/AD5432/AD5443 Data Sheet Rev. G  Page 16 of 24 Bipolar Operation In some applications, it may be necessary to generate full 4quadrant multiplying operation or a bipolar output swing. This can easily be accomplished by using another external amplifier and some external resistors, as shown in Figure 42. In this circuit, the second amplifier, A2, provides a gain of 2. Biasing the external amplifier with an offset from the reference voltage results in full 4quadrant multiplying operation. The transfer function of this circuit shows that both negative and positive output voltages are created as the input data, D, which is incremented from code zero (VOUT = −VREF) to midscale (VOUT = 0 V) to full scale (VOUT = +VREF). REF n REF OUT V D V V − × = − 1 2 where D is the fractional representation of the digital word loaded to the DAC and n is the resolution of the DAC. D = 0 to 255 (8bit AD5426) = 0 to 1023 (10bit AD5432) = 0 to 4095 (12bit AD5443) When VIN is an ac signal, the circuit performs 4quadrant multiplication. Table 6 shows the relationship between digital code and the expected output voltage for bipolar operation (AD5426, 8bit device). Table 6. Bipolar Code Table Digital Input Analog Output (V) 1111 1111 +VREF (127/128) 1000 0000 0 0000 0001 −VREF (127/128) 0000 0000 −VREF (128/128) Stability In the ItoV configuration, the IOUT of the DAC and the inverting node of the op amp must be connected as close as possible and proper PCB layout techniques must be employed. Since every code change corresponds to a step function, gain peaking may occur if the op amp has limited gain bandwidth product (GBP) and there is excessive parasitic capacitance at the inverting node. This parasitic capacitance introduces a pole into the openloop response that can cause ringing or instability in closedloop applications. An optional compensation capacitor, C1, can be added in parallel with RFB for stability, as shown in Figure 41 and Figure 42. Too small a value of C1 can produce ringing at the output, while too large a value can adversely affect the settling time. C1 should be found empirically, but 1 pF to 2 pF is generally adequate for compensation. VOUT = –VREF TO +VREF SCLK SDIN GND VREF ±10V SYNC IOUT2 IOUT1 RFB AGND AD5426/ AD5432/ AD5443 R1 R2 A1 VREF VDD VDD C1 NOTES 1. R1 AND R2 ARE USED ONLY IF GAIN ADJUSTMENT IS REQUIRED. ADJUST R1 FOR VOUT = 0V WITH CODE 10000000 LOADED TO DAC. 2. MATCHING AND TRACKING IS ESSENTIAL FOR RESISTOR PAIRS R3 AND R4. 3. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED IF A1/A2 IS A HIGH SPEED AMPLIFIER. MICROCONTROLLER R4 10k Ω R5 20k Ω R3 20k Ω A2 A1 Figure 42. Bipolar Operation 
