CYRF69313_13 datasheet(1/81 Pages) CYPRESS

Part #	CYRF69313

Description	Programmable Radio-on-Chip LPstar

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Manufacturer	CYPRESS [Cypress Semiconductor]

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CYRF69313

Programmable Radio-on-Chip LPstar

Cypress Semiconductor Corporation

•

198 Champion Court

•

San Jose

, CA 95134-1709

•

408-943-2600

Document Number: 001-66503 Rev. *D

Revised April 27, 2013

Programmable Radio-on-Chip LPstar

Features

■ Radio System-on-Chip, with built-in 8-bit MCU in a single

device.

■ Operates in the unlicensed worldwide Industrial, Scientific, and

Medical (ISM) band (2.400 GHz to 2.483 GHz).

■ On

Air

compatible

with

second

generation

radio

WirelessUSB™ LP and PRoC LP.

■ Pin-to-pin compatible with PRoC LP except the pin 31 and

pin 37.

Intelligent

■ M8C based 8-bit CPU, optimized for human interface devices

(HID) applications

■ 256 bytes of SRAM

■ 8 Kbytes of flash memory with EEPROM emulation

■ In-System reprogrammable through D+/D– pins

■ CPU speed up to 12 MHz

■ 16-bit free running timer

■ Low power wakeup timer

■ 12-bit programmable interval timer with interrupts

■ Watchdog timer

Low Power

■ 21 mA operating current (Transmit at –5 dBm)

■ Sleep current less than 1 µA

■ Operating voltage from 4.0 V to 5.25 V DC

■ Fast startup and fast channel changes

■ Supports coin-cell operated applications

Reliable and Robust

■ Receive sensitivity typical –90 dBm

■ AutoRate™ – dynamic data rate reception

❐ Enables data reception for any of the supported bit rates

automatically.

❐ DSSS (250 Kbps), GFSK (1 Mbps)

■ Operating temperature from 0 °C to 70 °C

■ Closed-loop frequency synthesis for minimal frequency drift

Simple Development

■ Auto transaction sequencer (ATS): MCU can stay sleeping

longer to save power

■ Framing, length, CRC16, and Auto ACK

■ Separate 16 byte transmit and receive FIFOs

■ Receive signal strength indication (RSSI)

■ Built-in serial peripheral interface (SPI) control while in sleep

mode

■ Advanced development tools based on Cypress’s PSoC

® Tools

■ Flexible I/O

■ 2 mA source current on all GPIO pins. Configurable 8 mA or

50 mA/pin current sink on designated pins

■ Each GPIO pin supports high impedance inputs, configurable

pull-up, open-drain output, CMOS/TTL inputs, and CMOS

output

■ Maskable interrupts on all I/O pins

BOM Savings

■ Low external component count

■ Small footprint 40-pin QFN (6 mm × 6 mm)

■ GPIOs that require no external components

■ Operates off a single crystal

■ Integrated 3.3 V regulator

■ Integrated pull-up on D–

USB Specification Compliance

■ Conforms to USB specification version 2.0

■ Conforms to USB HID specification version 1.1

■ Supports one low speed USB device address

■ Supports one control endpoint and two data end points

■ Integrated USB transceiver

Applications

■ Wireless keyboards and mice

■ Presentation tools

■ Wireless gamepads

■ Remote controls

■ Toys

■ Fitness

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