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CY62157ELL-55ZSXE Datasheet(PDF) 4 Page - Cypress Semiconductor |
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CY62157ELL-55ZSXE Datasheet(HTML) 4 Page - Cypress Semiconductor |
4 / 18 page CY62157E MoBL® Document Number: 38-05695 Rev. *I Page 4 of 18 Maximum Ratings Exceeding maximum ratings may shorten the useful life of the device. User guidelines are not tested. Storage Temperature ............................. –65 °C to + 150 °C Ambient Temperature with Power Applied ........................................ –55 °C to + 125 °C Supply Voltage to Ground Potential .........................................................–0.5 V to 6.0 V DC Voltage Applied to Outputs in High Z State[4, 5] .........................................–0.5 V to 6.0 V DC Input Voltage[4, 5]......................................–0.5 V to 6.0 V Output Current into Outputs (LOW) ............................20 mA Static Discharge Voltage (MIL-STD-883, Method 3015) .................................> 2001 V Latch up Current ....................................................> 200 mA Operating Range Device Range Ambient Temperature VCC[6] CY62157ELL Industrial –40 °C to +85 °C 4.5 V to 5.5 V Automotive –40 °C to +125 °C Electrical Characteristics Over the Operating Range Parameter Description Test Conditions 45 ns (Industrial) 55 ns (Automotive) Unit Min Typ[7] Max Min Typ[7] Max VOH Output HIGH Voltage VCC = 4.5 V IOH = –1 mA 2.4 – – 2.4 – – V VCC = 5.5 V IOH = –0.1 mA – – 3.4 [8] – – 3.4 [8] VOL Output LOW Voltage IOL = 2.1 mA – – 0.4 – – 0.4 V VIH Input HIGH Voltage VCC = 4.5 V to 5.5 V 2.2 – VCC + 0.5 2.2 – VCC + 0.5 V VIL Input LOW Voltage VCC = 4.5 V to 5.5 V –0.5 – 0.8 –0.5 – 0.8 V IIX Input Leakage Current GND < VI < VCC –1 – +1 –4 – +4 A IOZ Output Leakage Current GND < VO < VCC, Output Disabled –1 – +1 –4 – +4 A ICC VCC Operating Supply Current f = fmax = 1/tRC VCC = VCC(max) IOUT = 0 mA CMOS levels – 18 25 – 18 35 mA f = 1 MHz – 1.8 3 – 1.8 4 ISB1 [9] Automatic CE Power Down Current – CMOS Inputs CE1 > VCC 0.2 V or CE2 < 0.2 V or (BHE and BLE) > VCC – 0.2 V, VIN > VCC – 0.2 V, VIN < 0.2 V, f = fmax (Address and Data Only), f = 0 (OE and WE), VCC = VCC(max) – 28– 2 30 A ISB2 [9] Automatic CE Power Down Current – CMOS Inputs CE1 > VCC – 0.2 V or CE2 < 0.2 V or (BHE and BLE) > VCC – 0.2 V, VIN > VCC – 0.2 V or VIN < 0.2 V, f = 0, VCC = VCC(max) – 28– 2 30 A Notes 4. VIL(min) = –2.0 V for pulse durations less than 20 ns for I < 30 mA. 5. VIH(max) = VCC + 0.75 V for pulse durations less than 20 ns. 6. Full device AC operation assumes a 100 s ramp time from 0 to VCC(min) and 200 s wait time after VCC stabilization. 7. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C. 8. Please note that the maximum VOH limit doesnot exceed minimum CMOS VIH of 3.5 V. If you are interfacing this SRAM with 5 V legacy processors that require a minimum VIH of 3.5V, please refer to Application Note AN6081 for technical details and options you may consider. 9. Chip enables (CE1 and CE2) and byte enables (BHE and BLE) need to be tied to CMOS levels to meet the ISB1 / ISB2 / ICCDR spec. Other inputs can be left floating. |
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