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CY62148E Datasheet(PDF) 4 Page - Cypress Semiconductor |
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CY62148E Datasheet(HTML) 4 Page - Cypress Semiconductor |
4 / 17 page CY62148E MoBL® Document Number: 38-05442 Rev. *L Page 4 of 17 Maximum Ratings Exceeding maximum ratings may shorten the useful life of the device. User guidelines are not tested. Storage temperature ............................... –65 °C to + 150 °C Ambient temperature with power applied ......................................... –55 °C to + 125 °C Supply voltage to ground potential ................. –0.5 V to 6.0 V (VCCmax + 0.5 V) DC voltage applied to outputs in high Z state [3, 4] ............. –0.5 V to 6.0 V (VCCmax + 0.5 V) DC input voltage [3, 4] ......... –0.5 V to 6.0 V (VCCmax + 0.5 V) Output current into outputs (LOW) ............................. 20 mA Static discharge voltage (per MIL-STD-883, Method 3015) .......................... > 2001 V Latch-up current .................................................... > 200 mA Operating Range Device Range Ambient Temperature VCC[5] CY62148E Industrial / Automotive-A –40 °C to +85 °C 4.5 V to 5.5 V Electrical Characteristics Over the operating range Parameter Description Test Conditions 45 ns 55 ns [6] Unit Min Typ [7] Max Min Typ [7] Max VOH[8] Output HIGH voltage VCC = 4.5 V, IOH = –1 mA 2.4 – – 2.4 – – V VCC = 5.5 V, IOH = –0.1 mA – – 3.4 [8] – – 3.4 [8] V VOL Output LOW voltage IOL = 2.1 mA – – 0.4 – – 0.4 V VIH Input HIGH voltage VCC = 4.5 V to 5.5 V 2.2 – VCC + 0.5 2.2 – VCC + 0.5 V VIL Input LOW voltage VCC = 4.5 V to 5.5 V For TSOPII package –0.5 – 0.8 – – – V For SOIC package – – – –0.5 – 0.6 [9] IIX Input leakage current GND < VI < VCC –1 – +1 –1 – +1 µA IOZ Output leakage current GND < VO < VCC, output disabled –1 – +1 –1 – +1 µA ICC VCC operating supply current f = fmax = 1/tRC VCC = VCC(max), IOUT = 0 mA CMOS levels – 1520– 15 20 mA f = 1 MHz – 2 2.5 – 2 2.5 ISB2 [10] Automatic CE power-down current – CMOS inputs CE > VCC – 0.2 V, VIN > VCC – 0.2 V or VIN < 0.2 V, f = 0, VCC = VCC(max) –1 7 – 1 7 µA Notes 3. VIL(min) = –2.0 V for pulse durations less than 20 ns for I < 30 mA. 4. VIH(max) = VCC + 0.75 V for pulse durations less than 20 ns. 5. Full device AC operation assumes a minimum of 100 µs ramp time from 0 to VCC(min) and 200 µs wait time after VCC stabilization. 6. SOIC package is available only in 55 ns speed bin. 7. Typical values are included for reference and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C. 8. Please note that the maximum VOH limit for this device does not exceed minimum CMOS VIH of 3.5V. If you are interfacing this SRAM with 5 V legacy processors that require a minimumVIH of 3.5 V, please refer to Application Note AN6081 for technical details and options you may consider. 9. Under DC conditions the device meets a VIL of 0.8 V. However, in dynamic conditions Input LOW Voltage applied to the device must not be higher than 0.6 V. This is applicable to SOIC package only. 10. Chip enable (CE) must be HIGH at CMOS level to meet the ISB2 / ICCDR spec. Other inputs can be left floating. |
Similar Part No. - CY62148E_13 |
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Similar Description - CY62148E_13 |
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