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CY62128ELL-45ZXI Datasheet(PDF) 7 Page - Cypress Semiconductor |
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CY62128ELL-45ZXI Datasheet(HTML) 7 Page - Cypress Semiconductor |
7 / 19 page CY62128E MoBL® Document Number: 38-05485 Rev. *K Page 7 of 19 Data Retention Characteristics Over the Operating Range Parameter Description Conditions Min Typ [11] Max Unit VDR VCC for data retention 2 – – V ICCDR [12] Data retention current VCC = VDR, CE1 > VCC 0.2 V or CE2 < 0.2 V, VIN > VCC – 0.2 V or VIN < 0.2 V Industrial / Automotive-A ––4 A Automotive-E – – 30 A tCDR [13] Chip deselect to data retention time 0–– ns tR [14] Operation recovery time CY62128ELL-45 45 – – ns CY62128ELL-55 55 – – Data Retention Waveform Figure 5. Data Retention Waveform [15] VCC(min) VCC(min) tCDR VDR > 2.0 V DATA RETENTION MODE tR VCC CE Notes 11. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C. 12. Only chip enables (CE1 and CE2) must be at CMOS level to meet the ISB2 / ICCDR spec. Other inputs can be left floating. 13. Tested initially and after any design or process changes that may affect these parameters. 14. Full device AC operation requires linear VCC ramp from VDR to VCC(min) > 100 µs or stable at VCC(min) > 100 µs. 15. CE is the logical combination of CE1 and CE2. When CE1 is LOW and CE2 is HIGH, CE is LOW; when CE1 is HIGH or CE2 is LOW, CE is HIGH. |
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