CY8C24223A, CY8C24423A

Programmable System-on-Chip

Cypress Semiconductor Corporation

•

198 Champion Court

•

San Jose

•

408-943-2600

Document Number: 001-52469 Rev. *H

Revised April 24, 2013

Features

• Up to 14-bit analog-to-digital converters (ADCs)

• Up to 9-bit digital-to-analog converters (DACs)

• Programmable gain amplifiers (PGAs)

• Programmable filters and comparators

• 8- to 32-bit timers, counters, and pulse width modulators

(PWMs)

• Cyclical redundancy check (CRC) and pseudo-random se-

quence (PRS) modules

• Full- or half-duplex UART

• SPI master or slave

• Connectable to all general purpose I/O (GPIO) pins

phase-locked loop (PLL)

sleep functionality

on all GPIOs

[1]

operation up to 400 kHz

Logic Block Diagram

Note

1. There are eight standard analog inputs on the GPIO. The other four analog inputs connect from the GPIO directly to specific switched-capacitor block inputs. See

the PSoC Technical Reference Manual for more details.

DIGITAL SYSTEM

SRAM

256 Bytes

Interrupt

Controller

Sleep and

Watchdog

Multiple Clock Sources

(Includes IMO, ILO, PLL, and ECO)

Global Digital Interconnect

Global Analog Interconnect

PSoC CORE

CPU Core (M8C)

SROM

Flash 4 KB

Digital

Block

Array

Multiply

Accum.

Internal

Voltage

Ref.

Digital

Clocks

POR and LVD

System Resets

Decimator

SYSTEM RESOURCES

ANALOG SYSTEM

Analog

Ref

Analog

Input

Muxing

I

(1 Row,

4 Blocks)

System Bus

Analog

Block

Array

(2 Columns,

6 Blocks)

Port 2

Port 1

Analog

Drivers

Port 0