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CY7C1472V33 Datasheet(PDF) 4 Page - Cypress Semiconductor |
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CY7C1472V33 Datasheet(HTML) 4 Page - Cypress Semiconductor |
4 / 38 page CY7C1470V33 CY7C1472V33 CY7C1474V33 Document Number: 38-05289 Rev. *S Page 4 of 38 Contents Pin Configurations ........................................................... 5 Pin Definitions .................................................................. 8 Functional Overview ........................................................ 9 Single Read Accesses ................................................ 9 Burst Read Accesses .................................................. 9 Single Write Accesses ................................................. 9 Burst Write Accesses ................................................ 10 Sleep Mode ............................................................... 10 Interleaved Burst Address Table ............................... 10 Linear Burst Address Table ....................................... 10 ZZ Mode Electrical Characteristics ............................ 10 Truth Table ...................................................................... 11 Partial Write Cycle Description ..................................... 12 Partial Write Cycle Description ..................................... 12 Partial Write Cycle Description ..................................... 13 IEEE 1149.1 Serial Boundary Scan (JTAG) .................. 14 Disabling the JTAG Feature ...................................... 14 Test Access Port (TAP) ............................................. 14 PERFORMING A TAP RESET .................................. 14 TAP REGISTERS ...................................................... 14 TAP Instruction Set ................................................... 14 TAP Controller State Diagram ....................................... 16 TAP Controller Block Diagram ...................................... 17 TAP Timing Diagram ...................................................... 17 TAP AC Switching Characteristics ............................... 18 3.3 V TAP AC Test Conditions ....................................... 19 3.3 V TAP AC Output Load Equivalent ......................... 19 2.5 V TAP AC Test Conditions ....................................... 19 2.5 V TAP AC Output Load Equivalent ......................... 19 TAP DC Electrical Characteristics and Operating Conditions ..................................................... 19 Identification Register Definitions ................................ 20 Scan Register Sizes ....................................................... 20 Identification Codes ....................................................... 20 Boundary Scan Exit Order ............................................. 21 Boundary Scan Exit Order ............................................. 22 Maximum Ratings ........................................................... 23 Operating Range ............................................................. 23 Neutron Soft Error Immunity ......................................... 23 Electrical Characteristics ............................................... 23 Capacitance .................................................................... 24 Thermal Resistance ........................................................ 24 AC Test Loads and Waveforms ..................................... 25 Switching Characteristics .............................................. 26 Switching Waveforms .................................................... 27 Ordering Information ...................................................... 29 Ordering Code Definitions ......................................... 29 Package Diagrams .......................................................... 30 Acronyms ........................................................................ 33 Document Conventions ................................................. 33 Units of Measure ....................................................... 33 Errata ............................................................................... 34 Part Numbers Affected .............................................. 34 Product Status ........................................................... 34 Ram9 Sync/NoBL ZZ Pin Issues Errata Summary .... 34 Document History Page ................................................. 35 Sales, Solutions, and Legal Information ...................... 38 Worldwide Sales and Design Support ....................... 38 Products .................................................................... 38 PSoC® Solutions ...................................................... 38 Cypress Developer Community ................................. 38 Technical Support ..................................................... 38 |
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