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OMAP3530ECBB Datasheet(PDF) 8 Page - Texas Instruments |
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OMAP3530ECBB Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 264 page  Contents OMAP3530/25 Applications Processor SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009 www.ti.com 1 OMAP3530/25 Applications Processor .............. 1 4.3 DPLL and DLL Specifications ...................... 141 1.1 Features .............................................. 1 5 VIDEO DAC SPECIFICATIONS ..................... 147 1.2 Description ............................................ 4 5.1 Interface Description ............................... 147 5.2 Electrical Specifications Over Recommended 1.3 Functional Block Diagram ............................ 7 Operating Conditions .............................. 149 Revision History ............................................... 9 5.3 Analog Supply (vdda_dac) Noise Requirements .. 151 2 TERMINAL DESCRIPTION ............................ 10 5.4 External Component Value Choice ................ 152 2.1 Terminal Assignment ................................ 10 6 TIMING REQUIREMENTS AND SWITCHING 2.2 Pin Assignments .................................... 14 CHARACTERISTICS .................................. 153 2.3 Ball Characteristics .................................. 27 6.1 Timing Test Conditions ............................ 153 2.4 Multiplexing Characteristics ......................... 86 6.2 Interface Clock Specifications ..................... 153 2.5 Signal Description ................................... 94 6.3 Timing Parameters ................................. 154 3 ELECTRICAL CHARACTERISTICS ................ 119 6.4 External Memory Interfaces ........................ 155 3.1 Power Domains .................................... 119 6.5 Video Interfaces .................................... 184 3.2 Absolute Maximum Ratings ........................ 121 6.6 Serial Communications Interfaces ................. 201 3.3 Recommended Operating Conditions ............. 123 6.7 Removable Media Interfaces ...................... 234 3.4 DC Electrical Characteristics ....................... 125 6.8 Test Interfaces ..................................... 249 3.5 Core Voltage Decoupling .......................... 128 7 PACKAGE CHARACTERISTICS .................... 255 3.6 Power-up and Power-down ........................ 130 7.1 Package Thermal Resistance ...................... 255 4 CLOCK SPECIFICATIONS ........................... 133 7.2 Device Support ..................................... 255 4.1 Input Clock Specifications ......................... 134 4.2 Output Clock Specifications ........................ 139 Contents 8 Submit Documentation Feedback |
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