MT46V32M16P-5BJ datasheet(67/93 Pages) MICRON

Part #	MT46V32M16P-5BJ

Description	Double Data Rate (DDR) SDRAM MT46V128M4 ??32 Meg x 4 x 4 banks MT46V64M8 ??16 Meg x 8 x 4 banks MT46V32M16 ??8 Meg x 16 x 4 banks

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Manufacturer	MICRON [Micron Technology]

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Micron Technology, Inc., reserves the right to change products or specifications without notice.

DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. O; Core DDR Rev. D 2/11 EN

67

512Mb: x4, x8, x16 DDR SDRAM

Operations

Figure 31:

Random READ Accesses

Notes:

1. DO n (or x or b or g) = data-out from column n (or column x or column b or column g).

2. BL = 2, BL = 4, or BL = 8 (if BL = 4 or BL = 8, the following burst interrupts the previous).

3. n', x', b', or g' indicate the next data-out following DO n, DO x, DO b, or DO g, respectively.

4. READs are to an active row in any bank.

5. Shown with nominal tAC, tDQSCK, and tDQSQ.

READ

NOP

READ

CL = 2

CL = 2.5

DO

n

DO

x'

DO

g

DO

n'

DO

b

DO

x

DO

b'

DO

n

DO

x'

DO

n'

DO

b

DO

x

DO

b'

T0

T1

T2

T3

T2n

T3n

T4

T5

T4n

T5n

READ

NOP

READ

T0

T1

T2

T3

T2n

T3n

T4

T5

T4n

T5n

CL = 3

DO

n

DO

x'

DO

n'

DO

b

DO

x

DO

b'

READ

NOP

READ

T0

T1

T2

T3

T3n

T4

T5

T4n

T5n

Bank,

Col n

Bank,

Col b

Bank,

Col x

Bank,

Col g

Bank,

Col n

Bank,

Col b

Bank,

Col x

Bank,

Col g

Bank,

Col n

Bank,

Col b

Bank,

Col x

Bank,

Col g

Command

Address

DQS

DQ

CK#

CK

Command

Address

DQS

DQ

CK#

CK

Command

Address

DQS

DQ

CK#

CK

Transitioning Data

Don’t Care

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MT46V32M16P-5BJ Datasheet(PDF) 67 Page - Micron Technology

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