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FPAL15SM60 Datasheet(PDF) 15 Page - Fairchild Semiconductor

Part No. FPAL15SM60
Description  Smart Power Module (SPM)
Download  17 Pages
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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FPAL15SM60 Datasheet(HTML) 15 Page - Fairchild Semiconductor

 
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©2002 Fairchild Semiconductor Corporation
Rev. B, February 2002
Note
1. RPCPL/RPCPH coupling at each SPM input is recommended in order to prevent input signals’ oscillation and it should be as close as possible to each SPM input
pin.
2. By virtue of integrating an application specific type HVIC inside the SPM, direct coupling to CPU terminals without any opto-coupler or transformer isolation is
possible.
3. VFO output is open collector type. This signal line should be pulled up to the positive side of the 5V power supply with approximately 4.7kΩ resistance. Please
refer to Fig. 15.
4. CSP15 of around 7 times larger than bootstrap capacitor CBS is recommended.
5. VFO output pulse width should be determined by connecting an external capacitor(CFOD) between CFOD(pin7) and COM(L)(pin2). (Example : if CFOD = 5.6 nF,
then tFO = 300 µs (typ.)) Please refer to the note 5 for calculation method.
6. Each input signal line should be pulled up to the 5V power supply with approximately 4.7k
Ω resistance (other RC coupling circuits at each input may be needed
depending on the PWM control scheme used and on the wiring impedance of the system’s printed circuit board). Approximately a 0.22~2nF by-pass capacitor
should be used across each power supply connection terminals.
7. To prevent errors of the protection function, the wiring around RSC, RF and CSC should be as short as possible.
8. In the short-circuit protection circuit, please select the RFCSC time constant in the range 3~4 µs. RF should be at least 30 times larger than RSC. (Recommended
Example: RSC = 56 Ω, RF = 3.9kΩ and CSC = 1nF)
9. Each capacitor should be mounted as close to the pins of the SPM as possible.
10.To prevent surge destruction, the wiring between the smoothing capacitor and the P&N pins should be as short as possible. The use of a high frequency non-
inductive capacitor of around 0.1~0.22 uF between the P&N pins is recommended.
11.Relays are used at almost every systems of electrical equipments of home appliances. In these cases, there should be sufficient distance between the CPU and
the relays. It is recommended that the distance be 5cm at least
Fig. 17. Application Circuit
M
15V line
5V line
5V line
5V line
CPU
Gating UH
Gating VH
Gating WH
Gating UL
Gating VL
Gating WL
Fault
Vdc
R
BS
D
BS
C
BS
C
PH
R
P
C
PL
R
P
C
FOD
C
SC
R
F
R
SC
R
TH
C
SP15
T em p. M onitoring
C
BPF
R
S
C
SPC15
C
SP05
C
SPC05
C
BSC
C
BS
C
BSC
C
BS
C
BSC
R
BS
D
BS
R
BS
D
BS
R
P
R
P
C
PH
C
PH
R
S RS
R
S
R
S
R
S
R
S
C
DCS
R
P
R
P
R
P
C
PL
C
PL
C
PF
WV
U
N
(14)
(15)
(16)
(17) P
(1) V
CC(L)
(2) COM
(L)
(3) IN
(UL)
(4) IN
(VL)
(5) IN
(WL)
(6) V
FO
(7) C
FOD
(8) C
SC
(12) R
TH
(11) V
TH
(13)
THERMISTOR
V
B(U) (29)
COM
(H) (22)
IN
(UH) (27)
V
S(U) (30)
V
CC(UH) (28)
V
B(V) (25)
IN
(VH) (23)
V
CC(VH) (24)
V
S(V) (26)
V
B(W) (20)
IN
(WH) (18)
V
CC(WH) (19)
V
S(W) (21)
(10) NC
(9) R
SC
V
CC
Wout
Uout
Vout
C
(SC)
C
(FOD)
V
(FO)
IN
(WL)
IN
(VL)
IN
(UL)
COM
(L)
Vcc
IN
COM
VB
HO
VS
Vcc
IN
COM
VB
HO
VS
Vcc
IN
COM
VB
HO
VS
+
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