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X9C102SI Datasheet(PDF) 5 Page - Intersil Corporation |
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X9C102SI Datasheet(HTML) 5 Page - Intersil Corporation |
5 / 10 page 5 FN8222.3 July 20, 2009 Power-up and Down Requirements At all times, voltages on the potentiometer pins must be less than ±VCC. The recall of the wiper position from non-volatile memory is not in effect until the VCC supply reaches its final value. The VCC ramp rate specification is always in effect. AC OPERATION CHARACTERISTICS tCl CS to INC Setup 100 ns tlD INC HIGH to U/D Change 100 ns tDI U/D to INC Setup 2.9 µs tlL INC LOW Period 1 µs tlH INC HIGH Period 1 µs tlC INC Inactive to CS Inactive 1 µs tCPH CS Deselect Time (STORE) 20 ms tCPH CS Deselect Time (NO STORE) 100 ns tIW (5) INC to VW/RW Change 100 µs tCYC INC Cycle Time 2 µs tCYC INC Input Rise and Fall Time 500 µs tR, tF Power-up to Wiper Stable (Note 7) 500 µs tPU VCC Power-up Rate (Note 7) 0.2 50 V/ms NOTES: 3. Absolute linearity is utilized to determine actual wiper voltage vs expected voltage = [VW(n)(actual) - VW(n)(expected )] = ±1 MI Maximum. 4. Relative linearity is a measure of the error in step size between taps = VW(n + 1) - [VW(n) + MI] = +0.2 MI. 5. 1 MI = Minimum Increment = RTOT/99. 6. Typical values are for TA = +25°C and nominal supply voltage. 7. This parameter is not 100% tested. Electrical Specifications Over recommended operating conditions unless otherwise stated. (Continued) SYMBOL PARAMETER TEST CONDITIONS LIMITS UNIT MIN TYP (Note 6) MAX Test Circuit #1 TEST POINT Vw/RW VR/RH VL/RL VS Test Circuit #2 FORCE VL/RL VW/Rw VH/RH TEST POINT CURRENT Circuit #3 SPICE Macro Model CW RTOTAL RL RH CL RW 10pF CL 10pF 25pF Endurance and Data Retention PARAMETER MIN UNIT Medium Endurance 100,000 Data changes per bit per register Data Retention 100 years AC Conditions of Test Input Pulse Levels 0V to 3V Input Rise and Fall Times 10ns Input Reference Levels 1.5V X9C102, X9C103, X9C104, X9C503 |
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