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M054LAN Datasheet(PDF) 42 Page - Nuvotem Talema

Part No. M054LAN
Description  ARM Cortex™-M0 32-BIT MICROCONTROLLER
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Maker  TALEMA [Nuvotem Talema]
Homepage  http://www.nuvotem.com
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M054LAN Datasheet(HTML) 42 Page - Nuvotem Talema

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M052/M054 Data Sheet
Publication Release Date: Mar 15, 2011
- 42 -
Revision V1.0
6.10 UART Interface Controller
NuMicro M051
series provides up to two channels of Universal Asynchronous
Receiver/Transmitters (UART). UART0~1 performs Normal Speed UART, and support flow
control function.
6.10.1 Overview
The Universal Asynchronous Receiver/Transmitter (UART) performs a serial-to-parallel
conversion on data received from the peripheral, and a parallel-to-serial conversion on data
transmitted from the CPU. The UART controller also supports IrDA SIR Function, and RS-485
mode functions. Each UART channel supports five types of interrupts including transmitter FIFO
empty interrupt (INT_THRE), receiver threshold level reaching interrupt (INT_RDA), line status
interrupt (parity error or framing error or break interrupt) (INT_RLS), receiver buffer time out
interrupt (INT_TOUT), and MODEM/Wakeup status interrupt (INT_MODEM). Interrupt number 12
(vector number is 28) supports UART0 interrupt. Interrupt number 13 (vector number is 29)
supports UART1 interrupt. Refer to Nested Vectored Interrupt Controller chapter for System
Interrupt Map.
The UART0~1 are equipped 15-bytes transmitter FIFO (TX_FIFO) and 15-bytes receiver FIFO
(RX_FIFO). The CPU can read the status of the UART at any time during the operation. The
reported status information includes the type and condition of the transfer operations being
performed by the UART, as well as 3 error conditions (parity error, framing error, and break
interrupt) probably occur while receiving data. The UART includes a programmable baud rate
generator that is capable of dividing clock input by divisors to produce the serial clock that
transmitter and receiver need. The baud rate equation is Baud Rate = UART_CLK / M * [BRD +
2], where M and BRD are defined in Baud Rate Divider Register (UA_BAUD). The Table 6–5 and
Table 6–6 list the equations in the various conditions and the UART baud rate setting table.
Mode
DIV_X_EN
DIV_X_ONE
Divider X
BRD
Baud rate equation
0
0
0
B
A
UART_CLK / [16 * (A+2)]
1
1
0
B
A
UART_CLK / [(B+1) * (A+2)] , B must >= 8
2
1
1
Don’t care
A
UART_CLK / (A+2), A must >=3
Table 6–5 UART Baud Rate Equation


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