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ST10F276-4TR3 Datasheet(PDF) 48 Page - STMicroelectronics |
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ST10F276-4TR3 Datasheet(HTML) 48 Page - STMicroelectronics |
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48 / 235 page  Bootstrap loader ST10F276E 48/235 Doc ID 12303 Rev 3 5.2.2 ST10 configuration in BSL When the ST10F276E has entered BSL mode, the configuration shown in Table 29 is automatically set (values that deviate from the normal reset values are marked in bold). Table 29. ST10 configuration in BSL mode Function or register Access Notes Watchdog Timer Disabled Register SYSCON 0404H (1) 1. In Bootstrap modes (standard or alternate) ROMEN, bit 10 of SYSCON, is always set regardless of EA pin level. BYTDIS, bit 9 of SYSCON, is set according to data bus width selection via Port0 configuration. XPEN bit set for Bootstrap via CAN or Alternate Boot Mode Context Pointer CP FA00H Register STKUN FC00H Stack Pointer SP FA40H Register STKOV FA00H Register BUSCON0 acc. to startup config.(2) 2. BUSCON0 is initialized with 0000h, external bus disabled, if pin EA is high during reset. If pin EA is low during reset, BUSACT0, bit 10, and ALECTL0, bit 9, are set enabling the external bus with lengthened ALE signal. BTYP field, bit 7 and 6, is set according to Port0 configuration. Register S0CON 8011H Initialized only if Bootstrap via UART Register S0BG acc. to ‘00’ byte Initialized only if Bootstrap via UART P3.10 / TXD0 ‘1’ Initialized only if Bootstrap via UART DP3.10 ‘1’ Initialized only if Bootstrap via UART CAN1 Status/Control Register 0000H Initialized only if Bootstrap via CAN CAN1 Bit Timing Register acc. to ‘0’ frame Initialized only if Bootstrap via CAN XPERCON 042DH XRAM1-2, XFlash, CAN1 and XMISC enabled. Initialized only if Bootstrap via CAN P4.6 / CAN1_TxD ‘1’ Initialized only if Bootstrap via CAN DP4.6 ‘1’ Initialized only if Bootstrap via CAN |
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