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PI7C9X111SL Datasheet(PDF) 10 Page - Pericom Semiconductor Corporation |
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PI7C9X111SL Datasheet(HTML) 10 Page - Pericom Semiconductor Corporation |
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10 / 78 page ![]() PI7C9X111SL PCIe-to-PCI Reversible Bridge Page 10 of 78 Pericom Semiconductor - Confidential Feb, 2010, Revision 1.5 1 INTRODUCTION PI7C9X111SL is a PCIe-to-PCI/PCI-X bridge. PI7C9X111SL is compliant with the PCI Express Base Specification, Revision 1.1, the PCI Express Card Electromechanical Specification, Revision 1.1, the PCI Local Bus Specification, Revision 3.0 and PCI Express to PCI/PCI-X Bridge Specification, Revision 1.0. PI7C9X111SL supports transparent mode operation. Also, PI7C9X111SL supports forward and reverse bridging. In forward bridge mode, PI7C9X111SL has an x1 PCI Express upstream port and a 32-bit PCI downstream port. The 32-bit PCI downstream port is 66MHz capable (see figure 1-1). In reverse bridge mode, PI7C9X111SL has a 32-bit PCI upstream port and an x1 PCI Express downstream port. PI7C9X111SL configuration registers are backward compatible with existing PCI bridge software and firmware. No modification of PCI bridge software and firmware is needed for the original operation. Figure 1-1 PI7C9X111SL Topology 1.1 PCI EXPRESS FEATURES • Compliant with PCI Express Base Specification, Revision 1.1 • Compliant with PCI Express Card Electromechanical Specification, Revision 1.1 • Compliant with PCI Express to PCI/PCI-X Bridge Specification, Revision 1.0 • Physical Layer interface (x1 link with 2.5Gb/s data rate) • Lane polarity toggle • Virtual Isochronous support (upstream TC1-7 generation, downstream TC1-7 mapping) • ASPM support • Beacon support • CRC (16-bit), LCRC (32-bit) • ECRC and advanced error reporting • PRBS (Pseudo Random Bit Sequencing) generator/checker for chip testing PI7C9X111SL x1 PCI Express Port Tx Rx PCI 32bit / 66MHz Bus PCI Device PCI Device PCI Device PCI Device |
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