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LM5008A Datasheet(PDF) 9 Page - Texas Instruments |
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LM5008A Datasheet(HTML) 9 Page - Texas Instruments |
9 / 23 page STOP RUN RT LM5008A RT/SD VIN Input Voltage LM5008A www.ti.com SNVS583F – MARCH 2009 – REVISED MARCH 2013 RT should be selected for a minimum on-time (at maximum VIN) greater than 400 ns, for proper current limit operation. This requirement limits the maximum frequency for each application, depending on VIN and VOUT. The LM5008A can be remotely disabled by taking the RT/SD pin to ground. See Figure 11. The voltage at the RT/SD pin is between 1.5 and 3.0 volts, depending on Vin and the value of the RT resistor. Figure 11. Shutdown Implementation Current Limit The LM5008A contains an intelligent current limit OFF timer. If the current in the Buck switch exceeds 0.51A the present cycle is immediately terminated, and a non-resetable OFF timer is initiated. The length of off-time is controlled by an external resistor (RCL) and the FB voltage (see the graph Current Limit Off-Time vs. VFB and RCL). When FB = 0V, a maximum off-time is required, and the time is preset to 35µs. This condition occurs when the output is shorted, and during the initial part of start-up. This amount of time ensures safe short circuit operation up to the maximum input voltage of 95V. In cases of overload where the FB voltage is above zero volts (not a short circuit) the current limit off-time will be less than 35µs. Reducing the off-time during less severe overloads reduces the amount of foldback, recovery time, and the start-up time. The off-time is calculated from Equation 5. (5) The current limit sensing circuit is blanked for the first 50-70ns of each on-time so it is not falsely tripped by the current surge which occurs at turn-on. The current surge is required by the re-circulating diode (D1) for its turn- off recovery. N-Channel Buck Switch and Driver The LM5008A integrates an N-Channel Buck switch and associated floating high voltage gate driver. The gate driver circuit works in conjunction with an external bootstrap capacitor and an internal high voltage diode. A 0.01 µF ceramic capacitor (C4) connected between the BST pin and SW pin provides the voltage to the driver during the on-time. During each off-time, the SW pin is at approximately 0V, and the bootstrap capacitor charges from Vcc through the internal diode. The minimum OFF timer, set to 300ns, ensures a minimum time each cycle to recharge the bootstrap capacitor. The internal pre-charge switch at the SW pin is turned on for ≊150 ns during the minimum off-time period, ensuring sufficient voltage exists across the bootstrap capacitor for the on-time. This feature helps prevent operating problems which can occur during very light load conditions, involving a long off-time, during which the voltage across the bootstrap capacitor could otherwise reduce below the Gate Drive UVLO threshold. The pre- charge switch also helps prevent startup problems which can occur if the output voltage is pre-charged prior to turn-on. After current limit detection, the pre-charge switch is turned on for the entire duration of the forced off- time . Copyright © 2009–2013, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: LM5008A |
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