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FIN1025 Datasheet(PDF) 3 Page - Fairchild Semiconductor

Part No. FIN1025
Description  3.3V LVDS 2-Bit High Speed Differential Driver
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Manufacturer  FAIRCHILD [Fairchild Semiconductor]
Direct Link  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FIN1025 Datasheet(HTML) 3 Page - Fairchild Semiconductor

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AC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Note 3: All typical values are at TA = 25°C and with VCC = 3.3V.
Note 4: tSK(LH), tSK(HL) is the skew between specified outputs of a single device when the outputs have identical loads and are switching in the same direc-
tion.
Note 5: tSK(PP) is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction
(either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.
Note 6: fMAX criteria: Input tR = tF < 1ns, 0V to 3V, 50% Duty Cycle; Output VOD > 250 mv, 45% to 55% Duty Cycle; all switching in phase channels.
Note 7: Test Circuits in Figures 2, 4, 6 are simplified representations of test fixture and DUT loading.
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
(Note 3)
tPLHD
Differential Propagation Delay
0.6
1.1
1.7
ns
LOW-to-HIGH
tPHLD
Differential Propagation Delay
0.6
1.2
1.7
ns
HIGH-to-LOW
tTLHD
Differential Output Rise Time (20% to 80%)
RL = 100 Ω, CL = 10 pF,
0.4
1.2
ns
tTHLD
Differential Output Fall Time (80% to 20%)
See Figure 2 (Note 7), and Figure 3
0.4
1.2
ns
tSK(P)
Pulse Skew |tPLH - tPHL|
0.4
ns
tSK(LH)
Channel-to-Channel Skew
0.05
0.3
ns
tSK(HL)
(Note 4)
tSK(PP)
Part-to-Part Skew (Note 5)
1.0
ns
fMAX
Maximum Frequency (Note 6)
RL = 100Ω, See Figure 6 (Note 7)
200
250
MHz
tZHD
Differential Output Enable Time from Z to HIGH
1.7
5.0
ns
tZLD
Differential Output Enable Time from Z to LOW
RL = 100Ω, CL = 10 pF,
1.7
5.0
ns
tHZD
Differential Output Disable Time from HIGH to Z See Figure 4 (Note 7), and Figure 5
2.7
5.0
ns
tLZD
Differential Output Disable Time from LOW to Z
2.7
5.0
ns
CIN
Input Capacitance
4.2
pF
COUT
Output Capacitance
5.2
pF


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