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FIN1019 Datasheet(PDF) 1 Page - Fairchild Semiconductor

Part No. FIN1019
Description  3.3V LVDS High Speed Differential Driver/Receiver
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Manufacturer  FAIRCHILD [Fairchild Semiconductor]
Direct Link  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FIN1019 Datasheet(HTML) 1 Page - Fairchild Semiconductor

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© 2001 Fairchild Semiconductor Corporation
DS500506
www.fairchildsemi.com
April 2001
Revised September 2001
FIN1019
3.3V LVDS High Speed Differential Driver/Receiver
General Description
This driver and receiver pair are designed for high speed
interconnects utilizing Low Voltage Differential Signaling
(LVDS) technology. The driver translates LVTTL signals to
LVDS levels with a typical differential output swing of
350mV and the receiver translates LVDS signals, with a
typical differential input threshold of 100mV, into LVTTL
levels. LVDS technology provides low EMI at ultra low
power dissipation even at high frequencies. This device is
ideal for high speed clock or data transfer.
Features
s Greater than 400Mbs data rate
s 3.3V power supply operation
s 0.5ns maximum differential pulse skew
s 2.5ns maximum propagation delay
s Low power dissipation
s Power-Off protection
s 100mV receiver input sensitivity
s Fail safe protection open-circuit, shorted and terminated
conditions
s Meets or exceeds the TIA/EIA-644 LVDS standard
s Flow-through pinout simplifies PCB layout
s 14-Lead SOIC and TSSOP packages save space
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Function Table
H
= HIGH Logic Level
L
= LOW Logic Level
X
= Don’t Care
Z
= High Impedance
Fail Safe
= Open, Shorted, Terminated
Connection Diagram
Pin Descriptions
Order Number
Package Number
Package Description
FIN1019M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
FIN1019MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Inputs
Outputs
RIN+
RIN−
RE
ROUT
LH
L
L
HL
L
H
XX
H
Z
Fail Safe Condition
L
H
DIN
DE
DOUT+
DOUT−
LH
L
H
HH
H
L
XL
Z
Z
Open
−Circuit or Z
H
L
H
Pin Name
Description
DIN
LVTTL Data Input
DOUT+
Non-inverting LVDS Output
DOUT−
Inverting LVDS Output
DE
Driver Enable (LVTTL, Active HIGH)
RIN+
Non-Inverting LVDS Input
RIN−
Inverting LVDS Input
ROUT
LVTTL Receiver Output
RE
Receiver Enable (LVTTL, Active LOW)
VCC
Power Supply
GND
Ground
NC
No Connect


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