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FIN1019 Datasheet(PDF) 3 Page - Fairchild Semiconductor

Part No. FIN1019
Description  3.3V LVDS High Speed Differential Driver/Receiver
Download  14 Pages
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Manufacturer  FAIRCHILD [Fairchild Semiconductor]
Direct Link  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FIN1019 Datasheet(HTML) 3 Page - Fairchild Semiconductor

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DC Electrical Characteristics (Continued)
Note 2: All typical values are at TA = 25°C and with VCC = 3.3V.
AC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Note 3: All typical values are at TA = 25°C and with VCC = 5V.
Note 4: tSK(PP) is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction
(either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.
Device Characteristics
ICC
Power Supply Current
Driver Enabled, Driver Load: RL = 100 Ω
12.5
mA
Receiver Disabled, No Receiver Load
Driver Enabled, Driver Load: RL = 100 Ω,
12.5
mA
Receiver Enabled, (RIN+ = 1V and RIN− = 1.4V)
or (RIN+ = 1.4V and ROUT− = 1V)
Driver Disabled, Receiver Enabled,
7.0
mA
(RIN+ = 1V and RIN− = 1.4V) or
(RIN+ = 1.4V and RIN− = 1V)
Driver Disabled, Receiver Disabled
7.0
mA
CIN
Input Capacitance
Any LVTTL or LVDS Input
4
pF
COUT
Output Capacitance
Any LVTTL or LVDS Output
6
pF
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
(Note 3)
Driver Timing Characteristics
tPLHD
Differential Propagation Delay
0.5
1.5
ns
LOW-to-HIGH
tPHLD
Differential Propagation Delay
0.5
1.5
ns
HIGH-to-LOW
RL = 100 Ω, CL = 10 pF,
tTLHD
Differential Output Rise Time (20% to 80%)
See Figure 2 and Figure 3
0.4
1.0
ns
tTHLD
Differential Output Fall Time (80% to 20%)
0.4
1.0
ns
tSK(P)
Pulse Skew |tPLH - tPHL|
0.5
ns
tSK(PP)
Part-to-Part Skew (Note 4)
1.0
ns
tZHD
Differential Output Enable Time from Z to HIGH RL = 100Ω, CL = 10 pF,
5.0
ns
tZLD
Differential Output Enable Time from Z to LOW
See Figure 4 and Figure 5
5.0
ns
tHZD
Differential Output Disable Time from HIGH to Z
5.0
ns
tLZD
Differential Output Disable Time from LOW to Z
5.0
ns
Receiver Timing Characteristics
tPLH
Propagation Delay LOW-to-HIGH
0.9
2.5
ns
tPHL
Propagation Delay HIGH-to-LOW
0.9
2.5
ns
tTLH
Output Rise time (20% to 80%)
|VID| = 400 mV, CL = 10 pF,
0.5
ns
tTHL
Output Fall time (80% to 20%)
See Figure 6 and Figure 7
0.5
ns
tSK(P)
Pulse Skew | tPLH - tPHL |
0.5
ns
tSK(PP)
Part-to-Part Skew (Note 4)
1.0
ns
tZH
LVTTL Output Enable Time from Z to HIGH
5.0
ns
tZL
LVTTL Output Enable Time from Z to LOW
RL = 500 Ω, CL = 10 pF,
5.0
ns
tHZ
LVTTL Output Disable Time from HIGH to Z
See Figure 8
5.0
ns
tLZ
LVTTL Output Disable Time from LOW to Z
5.0
ns


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