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SC41343DW Datasheet(PDF) 8 Page - Freescale Semiconductor, Inc
FREESCALE [Freescale Semiconductor, Inc]
SC41343DW Datasheet(HTML) 8 Page - Freescale Semiconductor, Inc
/ 20 page
The encoder serially transmits trinary data as defined by
the state of the A1 – A5 and A6/D6 – A9/D9 input pins. These
pins may be in either of three states (low, high, or open) allow-
ing 19,683 possible codes. The transmit sequence is initiated
by a low level on the TE input pin. Upon power–up, the
MC145026 can continuously transmit as long as TE remains
low (also, the device can transmit two–word sequences by
pulsing TE low). However, no MC145026 application should
be designed to rely upon the first data word transmitted im-
mediately after power–up because this word may be invalid.
Between the two data words, no signal is sent for three data
periods (see Figure 10).
Each transmitted trinary digit is encoded into pulses (see
Figure 11). A logic 0 (low) is encoded as two consecutive
short pulses, a logic 1 (high) as two consecutive long pulses,
and an open (high impedance) as a long pulse followed by a
short pulse. The input state is determined by using a weak
“output” device to try to force each input high then low. If only
a high state results from the two tests, the input is assumed to
be hardwired to VDD. If only a low state is obtained, the input
is assumed to be hardwired to VSS. If both a high and a low
can be forced at an input, an open is assumed and is encoded
as such. The “high” and “low” levels are 70% and 30% of the
supply voltage as shown in the Electrical Characteristics
table. The weak “output” device sinks/sources up to 110
a 5 V supply level, 500
µA at 10 V, and 1 mA at 15 V.
The TE input has an internal pull–up device so that a simple
switch may be used to force the input low. While TE is high
and the second–word transmission has timed out, the encod-
er is completely disabled, the oscillator is inhibited, and the
current drain is reduced to quiescent current. When TE is
brought low, the oscillator is started and the transmit se-
quence begins. The inputs are then sequentially selected,
and determinations are made as to the input logic states. This
information is serially transmitted via the Dout pin.
This decoder receives the serial data from the encoder and
outputs the data, if it is valid. The transmitted data, consisting
of two identical words, is examined bit by bit during reception.
The first five trinary digits are assumed to be the address. If
the received address matches the local address, the next four
(data) bits are internally stored, but are not transferred to the
output data latch. As the second encoded word is received,
the address must again match. If a match occurs, the new
data bits are checked against the previously stored data bits.
If the two nibbles of data (four bits each) match, the data is
transferred to the output data latch by VT and remains until
new data replaces it. At the same time, the VT output pin is
brought high and remains high until an error is received or un-
til no input signal is received for four data periods (see Figure
Although the address information may be encoded in tri-
nary, the data information must be either a 1 or 0. A trinary
(open) data line is decoded as a logic 1.
This decoder operates in the same manner as the
MC145027 except that nine address lines are used and no
data output is available. The VT output is used to indicate that
a valid address has been received. For transmission security,
two identical transmitted words must be consecutively re-
ceived before a VT output signal is issued.
The MC145028 allows 19,683 addresses when trinary lev-
els are used. 512 addresses are possible when binary levels
A1 – A5, A6/D6 – A9/D9
Address, Address/Data Inputs (Pins 1 – 7, 9, and 10)
These address/data inputs are encoded and the data is
sent serially from the encoder via the Dout pin.
RS, CTC, RTC
(Pins 11, 12, and 13)
These pins are part of the oscillator section of the encoder
(see Figure 9).
If an external signal source is used instead of the internal
oscillator, it should be connected to the RS input and the RTC
and CTC pins should be left open.
Transmit Enable (Pin 14)
This active–low transmit enable input initiates transmission
when forced low. An internal pull–up device keeps this input
normally high. The pull–up current is specified in the Electri-
cal Characteristics table.
Data Out (Pin 15)
This is the output of the encoder that serially presents the
encoded data word.
Negative Power Supply (Pin 8)
The most–negative supply potential. This pin is usually
Positive Power Supply (Pin 16)
The most–positive power supply pin.
MC145027 AND MC145028 DECODERS
A1 – A5, A1 – A9
Address Inputs (Pins 1 – 5) — MC145027,
Address Inputs (Pins 1 – 5, 15, 14, 13, 12) — MC145028
These are the local address inputs. The states of these
pins must match the appropriate encoder inputs for the VT pin
to go high. The local address may be encoded with trinary or
D6 – D9
Data Outputs (Pins 15, 14, 13, 12) — MC145027 Only
These outputs present the binary information that is on
encoder inputs A6/D6 through A9/D9. Only binary data is
acknowledged; a trinary open at the MC145026 encoder is
decoded as a high level (logic 1).
Data In (Pin 9)
This pin is the serial data input to the decoder. The input
voltage must be at CMOS logic levels. The signal source driv-
ing this pin must be dc coupled.
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