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OPA602SM Datasheet(PDF) 7 Page - Texas Instruments

Part # OPA602SM
Description  High-Speed Precision Difet OPERATIONAL AMPLIFIER
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

OPA602SM Datasheet(HTML) 7 Page - Texas Instruments

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OPA602
7
SBOS155A
www.ti.com
TYPICAL CHARACTERISTICS (Cont.)
At TA = +25°C and VS = ±15VDC, unless otherwise noted.
POWER-SUPPLY REJECTION vs FREQUENCY
140
1
Frequency (Hz)
10
100
1k
10k
100k
1M
10M
120
100
80
60
40
20
0
+
COMMON-MODE REJECTION vs FREQUENCY
140
1
Frequency (Hz)
10
100
1k
10k
100k
1M
10M
120
100
80
60
40
20
0
APPLICATIONS INFORMATION
Unity-gain stability with good phase margin and excellent
output drive characteristics bring freedom from the subtle
problems associated with other high-speed amplifiers. How-
ever, as with any high-speed, wide bandwidth circuitry, care-
ful circuit layout will ensure best performance. Make short,
direct interconnections and avoid stray wiring capacitance—
especially at the inverting input pin.
Power supplies should be bypassed with good high-frequency
capacitors positioned close to the op amp pins. In most cases
0.1
µF ceramic capacitors are adequate. Applications with
heavier loads and fast transient waveforms may benefit from
use of additional 1.0
µF tantalum bypass capacitors.
INPUT BIAS CURRENT GUARDING
Leakage currents across printed circuit boards can easily
exceed the input bias current of the OPA602. A circuit board
“guard” pattern, as shown in Figure 1, is an effective solution
to difficult leakage problems. This guard pattern must be
repeated on all layers of a multilayer board. By surrounding
critical high impedance input circuitry with a low impedance
circuit connection at the same potential, leakage currents will
flow harmlessly to the low-impedance node.
Input bias current may also be degraded by improper han-
dling or cleaning. Contamination from handling parts and
circuit boards may be cleaned with appropriate solvents and
deionized water. Each rinsing operation should be followed
by a 30-minute bake at +85
°C.
Board Layout for Input Guarding:
Guard top and bottom of board.
Alternate—use Teflon® standoff for sensitive input pins.
Teflon® E.I. Du Pont de Nemours & Co.
FIGURE 1. Connection of Input Guard.
2
3
In
Noninverting
6
Out
2
3
In
Inverting
6
Out
2
3
In
Buffer
6
Out
OPA602
OPA602
OPA602


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