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PIC24FJ64GA010 Datasheet(PDF) 8 Page - Microchip Technology |
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PIC24FJ64GA010 Datasheet(HTML) 8 Page - Microchip Technology |
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8 / 258 page  PIC24FJ128GA010 FAMILY DS39747F-page 8 2005-2012 Microchip Technology Inc. 1.1.4 EASY MIGRATION Regardless of the memory size, all devices share the same rich set of peripherals, allowing for a smooth migration path as applications grow and evolve. The consistent pinout scheme used throughout the entire family also aids in migrating to the next larger device. This is true when moving between devices with the same pin count, or even jumping from 64-pin to 80-pin to 100-pin devices. The PIC24F family is pin-compatible with devices in the dsPIC33 family, and shares some compatibility with the pinout schema for PIC18 and dsPIC30. This extends the ability of applications to grow from the relatively simple, to the powerful and complex, yet still selecting a Microchip device. 1.2 Other Special Features • Communications: The PIC24FJ128GA010 family incorporates a range of serial communica- tion peripherals to handle a range of application requirements. All devices are equipped with two independent UARTs with built-in IrDA encoder/decoders. There are also two indepen- dent SPI modules, and two independent I2C modules that support both Master and Slave modes of operation. • Parallel Master/Enhanced Parallel Slave Port: One of the general purpose I/O ports can be reconfigured for enhanced parallel data communi- cations. In this mode, the port can be configured for both master and slave operations, and supports 8-bit and 16-bit data transfers with up to 16 external address lines in Master modes. • Real-Time Clock/Calendar: This module implements a full-featured clock and calendar with alarm functions in hardware, freeing up timer resources and program memory space for use of the core application. • 10-Bit A/D Converter: This module incorporates programmable acquisition time, allowing for a channel to be selected and a conversion to be initiated without waiting for a sampling period, as well as faster sampling speeds. 1.3 Details on Individual Family Members Devices in the PIC24FJ128GA010 family are available in 64-pin, 80-pin and 100-pin packages. The general block diagram for all devices is shown in Figure 1-1. The devices are differentiated from each other in two ways: 1. Flash program memory (64 Kbytes for PIC24FJ64GA devices, 96 Kbytes for PIC24FJ96GA devices and 128 Kbytes for PIC24FJ128GA devices). 2. Available I/O pins and ports (53 pins on 6 ports for 64-pin devices, 69 pins on 7 ports for 80-pin devices and 84 pins on 7 ports for 100-pin devices). Note also that, since interrupt-on-change inputs are available on every I/O pin for this family of devices, the number of CN inputs also differs between package sizes. All other features for devices in this family are identical. These are summarized in Table 1-1. A list of the pin features available on the PIC24FJ128GA010 family devices, sorted by function, is shown in Table 1-2. Note that this table shows the pin location of individual peripheral features and not how they are multiplexed on the same pin. This information is provided in the pinout diagrams in the beginning of the data sheet. Multiplexed features are sorted by the priority given to a feature, with the highest priority peripheral being listed first. |
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