UCC2895-W datasheet(7/28 Pages) TI1 | BiCMOS Advanced Phase-Shift PWM Controller

7 / 28 page

UCC1895, UCC2895, UCC3895

www.ti.com

SLUS157P – DECEMBER 1999 – REVISED JUNE 2013

TERMINAL FUNCTIONS (continued)

TERMINAL

I/O

DESCRIPTION

NAME

NO.

OUTA

OUTB

The four outputs are 100-mA complementary MOS drivers, and are optimized to drive FET driver circuits

such as UCC27424 or gate drive transformers.

OUTC

OUTD

PGND

Output stage ground.

RAMP

Inverting input of the PWM comparator.

5 V, ±1.2%, 5 mA voltage reference. For best performance, bypass with a 0.1-

μF low ESR, low ESL

REF

capacitor to ground. Do not use more than 4.7

μF of total capacitance on this pin.

Oscillator timing resistor for programming the switching frequency.

SS/DISB

Soft-start and disable pin which combines the two independent functions.

SYNC

I/O

The oscillator synchronization pin is bidirectional.

The power supply input pin, VDD, must be bypassed with a minimum of a 1-

μF low ESR, low ESL capacitor

VDD

to ground. The addition of a 10-

μF low ESR, low ESL between VDD and PGND is recommended.

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