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MRF24WB0MB Datasheet(PDF) 13 Page - Microchip Technology |
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MRF24WB0MB Datasheet(HTML) 13 Page - Microchip Technology |
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13 / 38 page  2010-2013 Microchip Technology Inc. DS70632C-page 13 MRF24WB0MA/MRF24WB0MB 2.3 Power States The MRF24WB0MA/MRF24WB0MB has the following power states: Hibernate, Sleep and Active (two sub- states), as shown in Figure 2.4. The selection of power state affects system behavior, and overall power con- sumption or battery life. Addition to that there is one “Standby” state that is not user-controlled. FIGURE 2-3: MRF24WB0MA/MRF24WB0MB POWER-STATE DIAGRAM 2.3.1 HIBERNATE STATE An “Off” state is defined as no power applied to the device. The Hibernate mode is the closest to controlled off that the module can approach. It is controlled through the HIBERNATE pin (high input puts the module into Hibernate). When in Hibernate, the module only consumes leakage current, but does not maintain state. Hibernate has to be fully controlled by the PIC MCU and requires the TCP/IP stack to restart on an awake. The module contains about 70µF of internal bulk capacitance. Supplies should be provisioned to supply sufficient charge on release of hibernate for required start time or sufficient delay must be provided in software after hibernate release and before Reset release. This state provides the best battery life for embedded products. Entering Hibernate for intervals of less than 30 seconds is not likely to save power. Battery life expectation can be more than a year for devices operating on AA cells that is in Hibernate except to wake up every hour for a small data transfer (<500 Bytes). 2.3.2 SLEEP STATE The Sleep state is a low power dynamic state that implements the 802.11 Power Save feature. In this mode, if enabled, the module will enter Power Save mode when all activity is complete. The module will wake autonomously to any PIC intervention to check DTIM beacons from the Access Point (AP). If any traffic is listed as queued for the module, then it will awaken and get the data from the AP on the next possible opportunity. When data is acquired, the module will interrupt the PIC microcontroller on a normal “data available” indication. If no data is available on a DTIM check, the module reenters the Power Save state until the next DTIM. The DTIM interval is programmed at the AP. This state can provide “as if on” behavior of the radio with a significant power savings versus “always on”. The battery life expectation of this mode is several days to several weeks. This mode is characterized by a very-low latency (as low as 200 mS) to begin data transfer from the low-power state. 2.3.3 ACTIVE STATE The Active state is identified as one of the two states where the radio circuitry is fully on. The two active states are the Receive state (RX ON) and Transmit state (TX ON). Note 1: See Section 2.2, Power-On Sequence. Off Hibernate Standby RX On TX On Sleep 200 µs 200 µs 10 µs Note 1 Note 1 |
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