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MT29F8G08DAAWCA Datasheet(PDF) 27 Page - Micron Technology |
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MT29F8G08DAAWCA Datasheet(HTML) 27 Page - Micron Technology |
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27 / 81 page  PDF: 09005aef81b80e13/Source: 09005aef81b80eac Micron Technology, Inc., reserves the right to change products or specifications without notice. 4gb_nand_m40a__2.fm - Rev. B 2/07 EN 27 ©2006 Micron Technology, Inc. All rights reserved. 4Gb, 8Gb, and 16Gb x8 NAND Flash Memory Command Definitions Figure 16: Status Register Operation PROGRAM Operations PROGRAM PAGE 80h-10h Micron NAND Flash devices are inherently page-programmed devices. Pages must be programmed consecutively within a block, from the least significant page address to most significant page address (that is, 0, 1, 2, …, 63). Random page address program- ming is prohibited. Micron NAND Flash devices also support partial-page programming operations. This means that any single bit can only be programmed one time before an erase is required; however, the page can be partitioned such that a maximum of four programming opera- tions are supported before an erase is required. SERIAL DATA INPUT 80h PROGRAM PAGE operations require loading the SERIAL DATA INPUT (80h) command into the command register, followed by 5 ADDRESS cycles, then the data. Serial data is loaded on consecutive WE# cycles starting at the given address. The PROGRAM (10h) command is written after the data input is complete. The control logic automatically executes the proper algorithm and controls all the necessary timing to program and verify the operation. Write verification only detects “1s” that are not successfully written to “0s.” R/B# goes LOW for the duration of array programming time, tPROG. The READ STATUS (70h) command and the RESET (FFh) command are the only commands valid during the programming operation. Bit 6 of the status register will reflect the state of R/B#. When the device reaches ready, read bit 0 of the status register to determine if the program operation passed or failed (see Figure 17 on page 28). The command register stays in read status register mode until another valid command is written to it. RANDOM DATA INPUT 85h After the initial data set is input, additional data can be written to a new column address with the RANDOM DATA INPUT (85h) command. The RANDOM DATA INPUT command can be used any number of times in the same page prior to issuing the PAGE WRITE (10h) command. See Figure 18 on page 28 for the proper command sequence. 70h CE# CLE WE# RE# I/Ox Status output tREA tCLR |
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