ADF4159

Data Sheet

Rev. B | Page 4 of 36

Parameter1

Min

Typ

Max

Unit

Test Conditions/Comments

NOISE CHARACTERISTICS

Normalized Phase Noise Floor3

PLL loop BW = 1 MHz

Integer-N Mode

−224

dBc/Hz

FRAC = 0

Fractional-N Mode

−217

dBc/Hz

−120

dBc/Hz

Measured at 10 kHz offset, normalized

to 1 GHz

Phase Noise Performance5

At VCO output

12,002 MHz Output6

−96

dBc/Hz

At 50 kHz offset, 100 MHz PFD frequency

1

Operating temperature: −40°C to +125°C.

2

Guaranteed by design. Sample tested to ensure compliance.

3

in-band phase noise performance as seen at the VCO output.

4

5

The phase noise is measured with the EV-ADF4159EB3Z and the Rohde & Schwarz FSUP signal source analyzer.

6

TIMING SPECIFICATIONS

unless otherwise noted.

Table 2. Write Timing

Parameter

Unit

Description

20

ns min

LE setup time

10

ns min

DATA to CLK setup time

10

ns min

DATA to CLK hold time

25

ns min

CLK high duration

25

ns min

CLK low duration

10

ns min

CLK to LE setup time

20

ns min

LE pulse width

Write Timing Diagram

CLK

DATA

LE

LE

DB30

DB1

(CONTROL BIT C2)

DB2

(CONTROL BIT C3)

DB0 (LSB)

DB31 (MSB)

Figure 2. Write Timing Diagram