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UCC28C43DGKG4 Datasheet(PDF) 7 Page - Texas Instruments

Part No. UCC28C43DGKG4
Description  BiCMOS LOW-POWER CURRENT-MODE PWM CONTROLLER
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

UCC28C43DGKG4 Datasheet(HTML) 7 Page - Texas Instruments

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UCC28C40, UCC28C41, UCC28C42, UCC28C43, UCC28C44, UCC28C45
UCC38C40, UCC38C41, UCC38C42, UCC38C43, UCC38C44, UCC38C45
SLUS458E -- AUGUST 2001 -- REVISED OCTOBER 2010
7
www.ti.com
APPLICATION INFORMATION
± 1% initial reference voltage
The BiCMOS internal reference of 2.5 V has an enhanced design and utilizes production trim to allow initial
accuracy of ±1% at room temperature and ± 2% over the full temperature range. This can be used to eliminate
an external reference in applications that do not require the extreme accuracy afforded by the additional device.
This is very useful for nonisolated dc-to-dc applications where the control device is referenced to the same
common as the output. It is also applicable in offline designs that regulate on the primary side of the isolation
boundary by looking at a primary bias winding, or perhaps from a winding on the output inductor of a
buck-derived circuit.
reduced discharge current variation
The original UC3842 oscillator did not have trimmed discharged current, and the parameter was not specified
on the datasheet. Since many customers attempted to use the discharge current to set a crude deadtime limit
the UC3842A family was released with a trimmed discharge current specified at 25°C. The
UCC28C4x/UCC38C4x series now offers even tighter control of this parameter, with approximately ±3%
accuracy at 25°C, and less than 10% variation over temperature using the UCC28C4x devices. This level of
accuracy can enable a meaningful limit to be programmed, a feature not currently seen in competitive BiCMOS
devices. The improved oscillator and reference also contribute to decreased variation in the peak to peak
variation in the oscillator waveform, which is often used as the basis for slope compensation for the complete
power system.
soft-start
The following diagram provides a typical soft-start circuit for use with the UCC38C42. The values of R and C
should be selected to bring the COMP pin up at a controlled rate, limiting the peak current supplied by the power
stage. After the soft-start interval is complete the capacitor continues to charge to VREF, effectively removing
the PNP transistor from circuit considerations.
The optional diode in parallel with the resistor forces a soft-start each time the PWM goes through UVLO and
the reference (VREF) goes low. Without the diode,the capacitor otherwise remains charged during a brief loss
of supply or brown-out, and no soft-start is enabled upon reapplication of VIN.
Figure 1
UDG--01072
VREF
UCC38C42
8
1
COMP
5
GND


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