W631GG6KB-15 datasheet(6/158 Pages) WINBOND | Double Data Rate architecture: two data transfers per clock cycle

Part No.	W631GG6KB-15

Description	Double Data Rate architecture: two data transfers per clock cycle

Download	158 Pages

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Manufacturer	WINBOND [Winbond]

Direct Link	http://www.winbond.com

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W631GG6KB

Publication Release Date: Feb. 27, 2013

Revision A04

- 6 -



Data masks (DM) for write data



Programmable CAS Write Latency (CWL) per operating frequency



Write Latency WL = AL + CWL



Multi purpose register (MPR) for readout a predefined system timing calibration bit sequence



System level timing calibration support via write leveling and MPR read pattern



ZQ Calibration for output driver and ODT using external reference resistor to ground



Asynchronous RESET# pin for Power-up initialization sequence and reset function



Programmable on-die termination (ODT) for data, data mask and differential strobe pairs



Dynamic ODT mode for improved signal integrity and preselectable termination impedances during

writes



2K Byte page size



Interface: SSTL_15



Packaged in WBGA 96 Ball (9X13 mm

2), using lead free materials with RoHS compliant

3.

ORDER INFORMATION

PART NUMBER

SPEED GRADE

OPERATING TEMPERATURE

W631GG6KB-11

DDR3-1866 (13-13-13)

0°C

≤ TCASE ≤ 85°C

W631GG6KB-12

DDR3-1600 (11-11-11)

0°C

≤ TCASE ≤ 85°C

W631GG6KB12I

DDR3-1600 (11-11-11)

-40°C

≤ TCASE ≤ 95°C

W631GG6KB12A

DDR3-1600 (11-11-11)

-40°C

≤ TA, TCASE ≤ 95°C

W631GG6KB12K

DDR3-1600 (11-11-11)

-40°C

≤ TA, TCASE ≤ 105°C

W631GG6KB-15

DDR3-1333 (9-9-9)

0°C

≤ TCASE ≤ 85°C

W631GG6KB15I

DDR3-1333 (9-9-9)

-40°C

≤ TCASE ≤ 95°C

W631GG6KB15A

DDR3-1333 (9-9-9)

-40°C

≤ TA, TCASE ≤ 95°C

W631GG6KB15K

DDR3-1333 (9-9-9)

-40°C

≤ TA, TCASE ≤ 105°C

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W631GG6KB-15 Datasheet(PDF) 6 Page - Winbond

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