FAN5070

4

REV. 1.0.1 8/7/01

Notes:

1. Steady State Voltage Regulation includes Initial Voltage Setpoint, Droop, Output Ripple and Output Temperature Drift and is

measured at the converter’s VFB sense point.

2. As measured at the converter’s VFB sense point. For motherboard applications, the PCB layout should exhibit no more than

0.5m

Ω trace resistance between the converter’s output capacitors and the CPU. Remote sensing should be used for optimal

performance.

3. Using the VFB pin for remote sensing of the converter’s output at the load, and the appropriate droop, the converter will be

in compliance with Intel’s VRM 8.5 specification. If Intel specifications on maximum plane resistance from the converter’s

output capacitors to the CPU are met, the specifications at the capacitors will also be met.

Table 1. Output Voltage Programming Codes for FAN5070

Note:

1. 0 = processor pin is tied to GND.

1 = processor pin is pulled up to 3.3V.

VID25mV

VID3

VID2

VID1

VID0

00100

1.050V

10100

1.075V

00011

1.100V

10011

1.125V

00010

1.150V

10010

1.175V

00001

1.200V

10001

1.225V

00000

1.250V

10000

1.275V

01111

1.300V

11111

1.325V

01110

1.350V

11110

1.375V

01101

1.400V

11101

1.425V

01100

1.450V

11100

1.475V

01011

1.500V

11011

1.525V

01010

1.550V

11010

1.575V

01001

1.600V

11001

1.625V

01000

1.650V

11000

1.675V

00111

1.700V

10111

1.725V

00110

1.750V

10110

1.775V

00101

1.800V

10101

1.825V