MAX14920 datasheet(4/29 Pages) MAXIM

Part #	MAX14920

Description	High-Accuracy 12-/16-Cell Measurement AFEs

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Manufacturer	MAXIM [Maxim Integrated Products]

Direct Link	https://www.maximintegrated.com/en.html

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Maxim Integrated

MAX14920/MAX14921

High-Accuracy 12-/16-Cell Measurement AFEs

DC ELECTRICAL CHARACTERISTICS (continued)

(VP = +65V, DGND = AGND, VL = VEN = +3.3V, VA = +5V, CSAMPLE = 1FF, TA = -40°C to +85°C, unless otherwise noted. Typical

values are at TA = +25°C.) (Note 2)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

ANALOG OUTPUT (AOUT)

Output Signal Range

VAOUT

Reference to AGND

+0.3

VA - 0.3

V

Amplifier Offset Voltage

VOFFSET

VAOUT = +3.3V, after self-calibration

(Note 5)

Q

50

Q

100

F

V

Temperature Offset Drift

If not recalibrated

Q

1.5

F

V/°C

Gain

A_V

Gain = VAOUT/VD

1

V/V

Output Error

VO_ERR

(Note 4)

-0.5

+0.5

mV

Amplifier Gain Error

VGAIN_ERR

ROUT = 100kI, VD = 2V to 4.5V (Note 6)

-0.2

+0.2

mV

VP Monitor Voltage

VPMON

[SC0, SC1, SC2, SC3]

= [0, 0, 1, 1]

MAX14920

VP/12

V

MAX14921

VP/16

VP Monitor Accuracy

VPMONA

[SC0, SC1, SC2, SC3] =

[0, 0, 1, 1]

-0.25

0

+2.5

%

CHARGE-BALANCE DRIVERS (BA_)

Output Low

VBAL

IBA_ = 1mA, VCV(n) - VCV(n - 1) = +3.3V

(Note 3)

VCV(n - 1)

+ 0.9

V

Output High

VBAH

IBA_ = -1mA, VCV(n) - VCV(n - 1) = +3.3V

(Note 3)

VCV(n) - 1.5

VCV(n)

V

Pulldown Resistance

RPDWN

0.65

0.9

kI

LOGIC OUTPUT (SDO)

Output Low Voltage

VOL

ISINK = 10mA

+0.9

V

Output High Voltage

VOH

ISOURCE = 0.5mA

VL - 0.25

V

Output Leakage Current

IL

VCS = VL

-1

+1

F

A

LOGIC INPUTS (SDI, SCLK, EN, SAMPL)

Input Low Voltage

VIL

VL < +2.3V

0.2 x VL

V

+2.3V < VL < +5.5V

0.3 x VL

Input High Voltage

VHL

VL < +2.3V

0.8 x VL

V

+2.3V < VL < +5.5V

0.7 x VL

Input Leakage Current

IL

-1

+1

F

A

DYNAMIC CHARACTERISTICS

AOUT Settling Time

tSET

Measured between channels with

+4V signal change. Settling to Q1mV

accuracy, CLOAD = 100pF (Figure 1)

5

F

s

Sampling Time

tSAMPL

CSAMPLE = 1FF

4

ms

CSAMPLE = 1FF, error calibration

40

Holding Delay Time

tHD

Delay from SMPLB set to 1 or SAMPL

falling edge to holding of all cell voltages

0.5

F

s

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