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DM74LS161A Datasheet(PDF) 6 Page - Fairchild Semiconductor

Part No. DM74LS161A
Description  Synchronous 4-Bit Binary Counters
Download  10 Pages
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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DM74LS161A Datasheet(HTML) 6 Page - Fairchild Semiconductor

 
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6
DM74LS161A Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Note 4: All typicals are at VCC = 5V, TA = 25°C.
Note 5: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 6: ICCH is measured with the load HIGH, then again with the load LOW, with all other inputs HIGH and all outputs OPEN.
Note 7: ICCL is measured with the clock input HIGH, then again with the clock input LOW, with all other inputs LOW and all outputs OPEN.
DM74LS161A Switching Characteristics
at VCC = 5V and TA = 25°C
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 4)
VI
Input Clamp Voltage
VCC = Min, II = −18 mA
−1.5
V
VOH
HIGH Level
VCC = Min, IOH = Max
2.7
3.4
V
Output Voltage
VIL = Max, VIH = Min
VOL
LOW Level
VCC = Min, IOL = Max
0.35
0.5
Output Voltage
VIL = Max, VIH = Min
V
IOL = 4 mA, VCC = Min
0.25
0.4
II
Input Current @ Max
VCC = Max
Enable T
0.2
Input Voltage
VI = 7V
Clock
0.2
mA
Load
0.2
Others
0.1
IIH
HIGH Level
VCC = Max
Enable T
40
Input Current
VI = 2.7V
Clock
40
µA
Load
40
Others
20
IIL
LOW Level
VCC = Max
Enable T
−0.8
Input Current
VI = 0.4V
Clock
−0.8
mA
Load
−0.8
Others
−0.4
IOS
Short Circuit Output Current
VCC = Max (Note 5)
−20
−100
mA
ICCH
Supply Current with Outputs HIGH VCC = Max (Note 6)
18
31
mA
ICCL
Supply Current with Outputs LOW
VCC = Max (Note 7)
19
32
mA
From (Input)
RL = 2 kΩ
Symbol
Parameter
To (Output)
CL = 15 pF
CL = 50 pF
Units
Min
Max
Min
Max
fMAX
Maximum Clock Frequency
25
20
MHz
tPLH
Propagation Delay Time
Clock to
25
30
ns
LOW-to-HIGH Level Output
Ripple Carry
tPHL
Propagation Delay Time
Clock to
30
38
ns
HIGH-to-LOW Level Output
Ripple Carry
tPLH
Propagation Delay Time
Clock to Any Q
22
27
ns
LOW-to-HIGH Level Output
(Load HIGH)
tPHL
Propagation Delay Time
Clock to Any Q
27
38
ns
HIGH-to-LOW Level Output
(Load HIGH)
tPLH
Propagation Delay Time
Clock to Any Q
24
30
ns
LOW-to-HIGH Level Output
(Load LOW)
tPHL
Propagation Delay Time
Clock to Any Q
27
38
ns
HIGH-to-LOW Level Output
(Load LOW)
tPLH
Propagation Delay Time
Enable T to
14
27
ns
LOW-to-HIGH Level Output
Ripple Carry
tPHL
Propagation Delay Time
Enable T to
15
27
ns
HIGH-to-LOW Level Output
Ripple Carry
tPHL
Propagation Delay Time
Clear to
28
45
ns
HIGH-to-LOW Level Output
Any Q


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