© 2000 Fairchild Semiconductor Corporation

DS006202

www.fairchildsemi.com

February 1991

Revised February 2000

DM74ALS137

3 to 8 Line Decoder/Demultiplexer with Address Latches

General Description

The ALS137 is a three line to eight line decoder/demulti-

plexer with latches on the three address inputs. When the

latch-enable input (GL) is LOW, the ALS137 acts as a

decoder/demultiplexer. When GL goes from LOW-to-HIGH,

the address present at the select inputs (A, B, and C) is

stored in the latches. Further address changes are ignored

as long as GL remains HIGH. The output enable controls,

G1 and G2, control the state of the outputs independently

of the select or latch-enable inputs. All of the outputs are

HIGH unless G1 is HIGH and G2 is LOW. The ALS137 is

ideally suited for implementing glitch-free decoders in

strobed (stored-address) applications in bus-oriented sys-

tems.

Features

s Combines decoder and 3-bit address latch

s Incorporates 3 enable inputs to simplify cascading

s Low power dissipation:

28 mW typ

s Switching specifications guaranteed over full tempera-

s Advanced oxide-isolated, ion-implanted Schottky TTL

process

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Function Table

L

= LOW State

H

= HIGH State

X

= Don't Care

Order Number

Package Number

Package Description

DM74ALS137M

M16A

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

DM74ALS137N

N16E

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Inputs

Outputs

Enable

Select

GL G1 G2

C

B

A

Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7

X

X

H

X

X

X

H

H

HHH

HHH

X

L

X

X

X

X

H

H

HHH

HHH

L

H

L

L

L

L

L

H

HHH

HHH

L

H

L

L

L

H

H

L

HHH

HHH

L

H

L

L

H

L

HH

L

H

H

HHH

L

H

L

L

H

H

HH

H

L

H

HHH

L

H

L

H

L

L

HH

HH

L

HHH

LH

LH

LH

H

H

H

H

H

L

H

H

L

H

L

H

H

L

HH

HHH

H

L

H

L

H

L

H

H

H

HH

HHH

HH

L

H

H

L

X

X

X

Output corresponding to stored

address, L; all others, H