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MPC992 Datasheet(PDF) 5 Page - Motorola, Inc

Part No. MPC992
Description  LOW VOLTAGE PLL CLOCK DRIVER
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Maker  MOTOROLA [Motorola, Inc]
Homepage  http://www.freescale.com
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MPC992 Datasheet(HTML) 5 Page - Motorola, Inc

   
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MPC992
TIMING SOLUTIONS
BR1333 — REV 5
5
MOTOROLA
a parallel specified crystal used in a series resonant mode
will exhibit an oscillatory frequency a few hundred ppm lower
than the specified value. For most processor implementa–
tions a few hundred ppm translates into kHz inaccuracies, a
level which does not represent a major issue.
Figure 2 shows an optional series capacitor in the crystal
oscillator interface. The on–board oscillator introduces a
small phase shift
in the overall loop which causes the
oscillator to operate at a frequency slightly slower than the
specified crystal. The series capacitor is used to compensate
the loop and allow the oscillator to function at the specified
crystal frequency. If a 100ppm type error is not important, the
capacitor can be left off the PCB. For more detailed
information, order Motorola Application Note AN1579/D.
Figure 2. Recommended Crystal Interface
XTAL2
CTUNE
(Optional)
XTAL1
MPC992
Table 1. Crystal Specifications
Parameter
Value
Crystal Cut
Fundamental AT Cut
Resonance
Series Resonance*
Frequency Tolerance
±75ppm at 25°C
Frequency/Temperature Stability
±150ppm 0 to 70°C
Operating Range
0 to 70
°C
Shunt Capacitance
5–7pF
Equivalent Series Resistance (ESR)
50 to 80
Ω max
Correlation Drive Level
100
µW
Aging
5ppm/Yr (First 3 Years)
Power Supply Filtering
The MPC992 is a mixed analog/digital product and as
such it exhibits some sensitivities that would not necessarily
be seen on a fully digital product. Analog circuitry is naturally
susceptible to random noise, especially if this noise is seen
on the power supply pins. The MPC992 provides separate
power supplies for the digital circuitry (VCCI) and the internal
PLL (VCCA) of the device. The purpose of this design
technique is to try and isolate the high switching noise digital
outputs from the relatively sensitive internal analog
phase–locked loop. In a controlled environment such as an
evaluation board this level of isolation is sufficient. However,
in a digital system environment where it is more difficult to
minimize noise on the power supplies a second level of
isolation may be required. The simplest form of isolation is a
power supply filter on the VCCA pin for the MPC992.
Figure 3 illustrates a typical power supply filter scheme.
The MPC992 is most susceptible to noise with spectral
content in the 10kHz to 1MHz range. Therefore the filter
should be designed to target this range. The key parameter
that needs to be met in the final filter design is the DC voltage
drop that will be seen between the VCC supply and the VCCA
pin of the MPC992. From the data sheet the IVCCA current
(the current sourced through the VCCA pin) is typically 15mA
(20mA maximum), assuming that a minimum of 3.0V must be
maintained on the VCCA pin very little DC voltage drop can
be tolerated when a 3.3V VCC supply is used. The resistor
shown in Figure 3 must have a resistance of 10–15
Ω to meet
the voltage drop criteria. The RC filter pictured will provide a
broadband filter with approximately 100:1 attenuation for
noise whose spectral content is above 20KHz. As the noise
frequency crosses the series resonant point of an individual
capacitor it’s overall impedance begins to look inductive and
thus increases with increasing frequency. The parallel
capacitor combination shown ensures that a low impedance
path to ground exists for frequencies well above the
bandwidth of the PLL.
Figure 3. Power Supply Filter
VCCA
VCC
MPC992
0.01
µF
22
µF
0.01
µF
3.3V
RS=10–15Ω
A higher level of attenuation can be achieved by replacing
the resistor with an appropriate valued inductor. A 1000
µH
choke will show a significant impedance at 10KHz
frequencies and above. Because of the current draw and the
voltage that must be maintained on the VCCA pin a low DC
resistance inductor is required (less than 15
Ω). Generally the
resistor/capacitor filter will be cheaper, easier to implement
and provide an adequate level of supply filtering.
The MPC992 provides sub–nanosecond output edge
rates and thus a good power supply bypassing scheme is a
must. The important aspect of the layout for the MPC992 is
low impedance connections between VCC and GND for the
bypass capacitors. Combining good quality general purpose
chip capacitors with good PCB layout techniques will
produce effective capacitor resonances at frequencies
adequate to supply the instantaneous switching current for
the MPC992 outputs. It is imperative that low inductance chip
capacitors are used; it is equally important that the board
layout does not introduce back all of the inductance saved by
using the leadless capacitors. Thin interconnect traces
between the capacitor and the power plane should be
avoided and multiple large vias should be used to tie the


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