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CD4512BCN Datasheet(PDF) 4 Page - Fairchild Semiconductor |
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CD4512BCN Datasheet(HTML) 4 Page - Fairchild Semiconductor |
4 / 8 page www.fairchildsemi.com 4 AC Electrical Characteristics (Note 4) TA = 25°C, tr = tf = 20 ns, CL = 50 pF Note 4: AC Parameters are guaranteed by DC correlated testing. Note 5: Capacitance guaranteed by periodic testing. Note 6: CPD determines the no load AC power of any CMOS device. For complete explanation, see Family Characteristics Application Note, AN-90. Symbol Parameter Conditions CD4512BM CD4512BC Units Min Typ Max Min Typ Max tPHL Propagation Delay VDD = 5V 225 500 225 750 ns HIGH-to-LOW Level VDD = 10V 75 175 75 200 ns VDD = 15V 57 130 57 150 ns tPLH Propagation Delay VDD = 5V 225 500 225 750 ns LOW-to-HIGH Level VDD = 10V 75 175 75 200 ns VDD = 15V 57 130 57 150 ns tTHL, tTLH Transition Time VDD = 5V 70 200 70 200 ns VDD = 10V 35 100 35 100 ns VDD = 15V 25 80 25 80 ns tPHZ, tPLZ Propagation Delay into VDD = 5V 50 125 50 125 ns 3-STATE from Logic Level VDD = 10V 25 75 25 75 ns VDD = 15V 19 60 19 60 ns tPZH, tPZL Propagation Delay to Logic VDD = 5V 50 125 50 125 ns Level from 3-STATE VDD = 10V 25 75 25 75 ns VDD = 15V 19 60 19 60 ns CIN Input Capacitance (Note 5) 7.5 15 7.5 15 pF COUT 3-STATE Output (Note 5) 7.5 15 7.5 15 pF Capacitance CPD Power Dissipation Capacity (Note 6) 150 150 pF |
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