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MPC953 Datasheet(PDF) 5 Page - Motorola, Inc

Part No. MPC953
Description  LOW VOLTAGE PLL CLOCK DRIVER
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Maker  MOTOROLA [Motorola, Inc]
Homepage  http://www.freescale.com
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MPC953 Datasheet(HTML) 5 Page - Motorola, Inc

   
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MPC953
ECLinPS and ECLinPS Lite
DL140 — Rev 3
5
MOTOROLA
by the impedance mismatch seen looking into the driver. The
parallel combination of the 43
Ω series resistor plus the output
impedance does not match the parallel combination of the
line impedances. The voltage wave launched down the two
lines will equal:
VL = VS ( Zo / (Rs + Ro +Zo))
Zo = 50
Ω || 50Ω
Rs = 43
Ω || 43Ω
Ro = 7
VL = 3.0 (25 / (21.5 + 7 + 25) = 3.0 (25 / 53.5)
= 1.40V
At the load end the voltage will double, due to the near
unity reflection coefficient, to 2.8V. It will then increment
towards the quiescent 3.0V in steps separated by one round
trip delay (in this case 4.0ns).
Figure 5. Single versus Dual Waveforms
TIME (nS)
3.0
2.5
2.0
1.5
1.0
0.5
0
2
4
6
8
10
12
14
OutB
tD = 3.9386
OutA
tD = 3.8956
In
Since this step is well above the threshold region it will not
cause any false clock triggering, however designers may be
uncomfortable with unwanted reflections on the line. To
better match the impedances when driving multiple lines the
situation in Figure 6 should be used. In this case the series
terminating resistors are reduced such that when the parallel
combination is added to the output buffer impedance the line
impedance is perfectly matched.
Figure 6. Optimized Dual Line Termination
7
MPC953
OUTPUT
BUFFER
RS = 36Ω
ZO = 50Ω
RS = 36Ω
ZO = 50Ω
7
Ω + 36Ω k 36Ω = 50Ω k 50Ω
25
Ω = 25Ω
SPICE level output buffer models are available for
engineers who want to simulate their specific interconnect
schemes. In addition IV characteristics are in the process of
being generated to support the other board level simulators in
general use.


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