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CD4029BCSJ Datasheet(PDF) 4 Page - Fairchild Semiconductor

Part No. CD4029BCSJ
Description  Presettable Binary/Decade Up/Down Counter
Download  8 Pages
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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CD4029BCSJ Datasheet(HTML) 4 Page - Fairchild Semiconductor

   
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4
AC Electrical Characteristics (Note 4)
TA = 25°C, CL = 50 pF, RL = 200k, Input trCL = tfCL = 20 ns, unless otherwise specified
Note 4: *AC Parameters are guaranteed by DC correlated testing.
Note 5: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see 74C Family Characteristics application
note, AN-90.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CLOCKED OPERATION
tPHL or tPLH
Propagation Delay Time
VDD = 5V
200
400
ns
to Q Outputs
VDD = 10V
85
170
ns
VDD = 15V
70
140
ns
tPHL or tPLH
Propagation Delay Time
VDD = 5V
320
640
ns
to Carry Output
VDD = 10V
135
270
ns
VDD = 15V
110
220
ns
tPHL or tPLH
Propagation Delay Time
CL = 15 pF
to Carry Output
VDD = 5V
285
570
ns
VDD = 10V
120
240
ns
VDD = 15V
95
190
ns
tTHL or tTLH
Transition Time/Q
VDD = 5V
100
200
ns
or Carry Output
VDD = 10V
50
100
ns
VDD = 15V
40
80
ns
tWH or tWL
Minimum Clock
VDD = 5V
160
320
ns
Pulse Width
VDD = 10V
70
135
ns
VDD = 15V
55
110
ns
trCL or tfCL
Maximum Clock Rise
VDD = 5V
15
µs
and Fall Time
VDD = 10V
10
µs
VDD = 15V
5
µs
tSU
Minimum Set-Up Time
VDD = 5V
180
360
ns
VDD = 10V
70
140
ns
VDD = 15V
55
110
ns
fCL
Maximum Clock Frequency
VDD = 5V
1.5
3.1
MHz
VDD = 10V
3.7
7.4
MHz
VDD = 15V
4.5
9
MHz
CIN
Average Input Capacitance
Any Input
5
7.5
pF
CPD
Power Dissipation Capacitance
Per Package (Note 5)
65
pF
PRESET ENABLE OPERATION
tPHL or tPLH
Propagation Delay Time
VDD = 5V
285
570
ns
to Q output
VDD = 10V
115
230
ns
VDD = 15V
95
195
ns
tPHL or tPLH
Propagation Delay Time
VDD = 5V
400
800
ns
to Carry Output
VDD = 10V
165
330
ns
VDD = 15V
135
260
ns
tWH
Minimum Preset Enable
VDD = 5V
80
160
ns
Pulse Width
VDD = 10V
30
60
ns
VDD = 15V
25
50
ns
tREM
Minimum Preset Enable
VDD = 5V
150
300
ns
Removal Time
VDD = 10V
60
120
ns
VDD = 15V
50
100
ns
CARRY INPUT OPERATION
tPHL or tPLH
Propagation Delay Time
VDD = 5V
265
530
ns
to Carry Output
VDD = 10V
110
220
ns
VDD = 15V
90
180
ns
tPHL, tPLH
Propagation Delay Time
CL = 15 pF
to Carry Output
VDD = 5V
200
400
ns
VDD = 10V
85
170
ns
VDD = 15V
70
140
ns


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