![]() |
Electronic Components Datasheet Search |
|
SAB82525N Datasheet(PDF) 16 Page - Siemens Semiconductor Group |
|
SAB82525N Datasheet(HTML) 16 Page - Siemens Semiconductor Group |
16 / 126 page ![]() Semiconductor Group 16 82525 82526 82525 82526 SAB SAB SAF SAF Figure 1 Block Diagram SAB 82525/SAB 82526 The HSCX SAB 82526 comprises one (channel B), the SAB 82525 two completely independent full-duplex HDLC channels (channel A and channel B), supporting various layer-1 functions by means of internal oscillator, Baud Rate Generator (BRG), Digital Phase Locked Loop (DPLL), and Time-Slot Assignment (TSA) circuits. Furthermore, layer-2 functions are performed by an on-chip LAP (Link Access Procedure, e.g. LAPB or LAPD) controller. µP Bus Interface SP-REG LAP Controller FIFO Transmit Receive FIFO Data Link Controller TSA Decoder Collision Detection DPLL Clock Controll DMA Interface Channel A ITB00946 Channel B A0-A6 D0-D7 RD/IC1 WR/IC0 CS ALE/IMO INT RES IM1 DRQTA DRQRA DACKA DACKB DRQRB DRQTB BRG RxDA TxDA RTSA CTSA/ CxDA TxCLKB AxCLKB RxCLKB TxDB RTSB CxDB RxDB CTSB/ TxCLKA AxCLKA RxCLKA |
Similar Part No. - SAB82525N |
|
Similar Description - SAB82525N |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |
allmanual.com |